VLSI neural network with digital weights and analog multipliers

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 3, Issue , 2001, Pages 233-236

  Koosh, Vincent F ^a   Goodman, Rodney ^a  

^a CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG MULTIPLIERS; HIDDEN UNITS; HOST COMPUTERS; OUTPUT NETWORK; TRAINING ALGORITHMS; XOR FUNCTION;

FEEDFORWARD NEURAL NETWORKS; SHIFT REGISTERS; ALGORITHMS; BOOLEAN FUNCTIONS; MULTIPLYING CIRCUITS; PERTURBATION TECHNIQUES; VLSI CIRCUITS;

VLSI CIRCUITS; NEURAL NETWORKS;

ANALOG MULTIPLIERS; DIGITAL WEIGHTS;

EID: 0034998201     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.921290     Document Type: Conference Paper

References (10)

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