Theory and practical implementation of harmonic resonant rail driver

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 2001, Pages 153-158

  Moon, J S ^a   Athas, W C ^a   Beerel, P A ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

Clock generation; Energy recovery circuit; Harmonic resonant rail driver; Pulse forming network

Indexed keywords

ALGORITHMS; CAPACITANCE; CMOS INTEGRATED CIRCUITS; FLIP FLOP CIRCUITS; HARMONIC GENERATION; MATHEMATICAL TRANSFORMATIONS; PASSIVE NETWORKS; RESONANT CIRCUITS; SQUARE WAVE GENERATORS; SYSTEM STABILITY; VLSI CIRCUITS;

CURRENT-FED PULSE FORMING NETWORK (CFPN); HARMONIC RESONANT RAIL DRIVERS;

TIMING CIRCUITS;

EID: 0034863856     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/383082.383122     Document Type: Conference Paper

References (10)

1. A low-power microprocessor based on resonant energy
2. A resonant signal driver for two-phase, almost-non-overlapping clocks
3. The design and implementation of a low-power clock-powered microprocessor
4. Non-dissipative rail drivers for adiabatic circuits
5. True single-phase energy-recovering logic for low-power, hight-speed VLSI