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Volumn , Issue , 2001, Pages 238-243

Checking equivalence for partial implementations

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BOOLEAN ALGEBRA; COMBINATORIAL MATHEMATICS; COMPUTATIONAL METHODS; COMPUTER SIMULATION; ERROR DETECTION; FORMAL LOGIC;

EID: 0034848823     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/378239.378471     Document Type: Conference Paper
Times cited : (68)

References (19)
  • 7
    • 84856140605 scopus 로고
    • Verification of sequential machines based on symbolic execution
    • Automatic Verification Methods for Finite State Systems
    • (1989) LNCS , vol.407 , pp. 365-373
    • Coudert, O.1    Berthet, C.2    Madre, J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.