Enabling alternating phase shifted mask designs for a full logic gate level: Design rules and design rule checking

Proceedings - Design Automation Conference

Volumn , Issue , 2001, Pages 79-84

  Liebmann, Lars ^a   Lund, Jennifer ^b   Heng, Fook Luen ^b   Graur, Ioana ^a  

^a IBM MICROELECTRONICS   (United States)

^b IBM RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; MASKS; PHASE SHIFT; PHOTOLITHOGRAPHY;

DESIGN RULE CHECKING (DRC) TOOLS;

LOGIC GATES;

EID: 0034848378     PISSN: 0738100X     EISSN: None     Source Type: Journal    
DOI: 10.1109/DAC.2001.156112     Document Type: Article

References (14)

1. Improving resolution in photolithography with a phase-shifting mask
2. Phase-shifting mask strategies: Isolated dark lines
3. Phase edge lithography for sub-0.1 um electrical channel length in a 200 mm full CMOS process
4. High-resolution ultraviolet defect inspection of DAP (darkfield alternate phase) reticles
5. Conjugate twin-shifter for new phase shift method to high resolution lithography
6. Application of alternating phase shift mask to device fabrication
7. 170 nm gates fabricated by phase shift mask and top anti-reflector process
8. Alternating phase shifted mask for logic gate levels, design and mask manufacturing
9. Application of automatic design migration to alternating phase shifted mask design
10. Enabling alternating phase shifted mask designs for a full logic gate level
11. Automatic generation of phase shift mask layouts