Colif: A multilevel design representation for application-specific multiprocessor system-on-chip design

Proceedings of the International Workshop on Rapid System Prototyping

Volumn , Issue , 2001, Pages 110-115

  Cesario W O ^a   Nicolescu, G ^a   Gauthier, L ^a   Lyonnard, D ^a   Jerraya, A A ^a  

^a TIMA LABORATORY   (France)

Author keywords

[No Author keywords available]

Indexed keywords

EMBEDDED SYSTEMS; NETWORK PROTOCOLS; TELECOMMUNICATION NETWORKS;

SYSTEM ON CHIP (SOC) DESIGN;

MICROPROCESSOR CHIPS;

EID: 0034840926     PISSN: 10746005     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)

1. Formal models for embedded system design
2. System level design using the systemC modeling platform
3. CoWare - A design environment for heterogeneous hardware/software systems
4. System-level models explore terrain
5. System design: Traditional concepts and new paradigms
6. System specification in Rosetta
7. The MARCO/DARPA Gigascale Silicon Research Center
8. Integrating SDL and VHDL for system level specification
9. Heterogeneous modeling and simulation of embedded systems in El Greco
10. Hardware/software co-design of embedded systems - The SPI workbench
11. Automatic generation of application-specific architectures for heterogeneous multiprocessor system-on-chip
12. Scalable and flexible cosimulation of SoC designs with heterogeneous multiprocessor target architectures