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Volumn 1, Issue 4, 1996, Pages 357-386

CoWare - A design environment for heterogeneous hardware/software systems

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING LANGUAGES; COMPUTER SIMULATION; DATA STRUCTURES; LARGE SCALE SYSTEMS; MICROPROCESSOR CHIPS; PAGING SYSTEMS; PROGRAM COMPILERS; SIMULATORS; SPREAD SPECTRUM COMMUNICATION;

EID: 0030263667     PISSN: 09295585     EISSN: None     Source Type: Journal    
DOI: 10.1007/BF00209910     Document Type: Article
Times cited : (43)

References (18)
  • 1
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    • Hamilton Island, Australia, May
    • J. Buck et al., "The token flow model." in Proceedings of the Data Flow Workshop, Hamilton Island, Australia, May 1992.
    • (1992) Proceedings of the Data Flow Workshop
    • Buck, J.1
  • 2
    • 0001325987 scopus 로고
    • PTOLEMY: A framework for simulating and prototyping heterogeneous systems
    • January
    • J. Buck et al., "PTOLEMY: A framework for simulating and prototyping heterogeneous systems." International Journal on Computer Simulation, January 1994.
    • (1994) International Journal on Computer Simulation
    • Buck, J.1
  • 4
    • 0026291944 scopus 로고
    • Illustration of the SFG-Tracing multi level behavioral verification methodology
    • Cambridge, MA, October
    • M. Genoe, L. Claesen, E. Verlind, F. Proesmans, and H. De Man, "Illustration of the SFG-Tracing multi level behavioral verification methodology," in Proceedings of the ICCD 91, Cambridge, MA, October 1991, pp. 338-341.
    • (1991) Proceedings of the ICCD 91 , pp. 338-341
    • Genoe, M.1    Claesen, L.2    Verlind, E.3    Proesmans, F.4    De Man, H.5
  • 5
    • 0023365727 scopus 로고
    • A visual formalism for complex systems
    • D.'Harel, "A visual formalism for complex systems." Science of Computer Programming (8), pp. 231-274, 1987.
    • (1987) Science of Computer Programming , Issue.8 , pp. 231-274
    • D'Harel1
  • 14
    • 0028751083 scopus 로고
    • Verification of loop transformations for real time signal processing applications
    • J. Rabaey, P. Chau, and J. Eldon, eds., IEEE Press, New York, NY
    • H. Samsom, F. Franssen, F. Catthoor, and H. De Man, "Verification of loop transformations for real time signal processing applications," in VLSI Signal Processing VII, J. Rabaey, P. Chau, and J. Eldon, eds., IEEE Press, New York, NY, 1994, pp. 208-217.
    • (1994) VLSI Signal Processing VII , pp. 208-217
    • Samsom, H.1    Franssen, F.2    Catthoor, F.3    De Man, H.4
  • 16
    • 27844607652 scopus 로고
    • Specification, simulation and implementation of a GSM speech codec with DSP station
    • May
    • M. Van Canneyt, "Specification, simulation and implementation of a GSM speech codec with DSP station." DSP & Multimedia Technology 3(5), pp. 6-15, May 1994.
    • (1994) DSP & Multimedia Technology , vol.3 , Issue.5 , pp. 6-15
    • Van Canneyt, M.1
  • 17
    • 0029219733 scopus 로고
    • PHIDEO: High-level synthesis of high throughput applications
    • January
    • J. van Meerbergen et al., "PHIDEO: High-level synthesis of high throughput applications." Journal of VLSI Signal Processing 9(1-2), pp. 89-104, January 1995.
    • (1995) Journal of VLSI Signal Processing , vol.9 , Issue.1-2 , pp. 89-104
    • Van Meerbergen, J.1
  • 18
    • 2442619880 scopus 로고
    • Algorithm specification in DSP station using data flow language
    • January
    • P. Willekens et al., "Algorithm specification in DSP station using data flow language." DSP Applications 3(1), pp. 8-16, January 1994.
    • (1994) DSP Applications , vol.3 , Issue.1 , pp. 8-16
    • Willekens, P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.