Design method for high reliable flip chip BGA package

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2001, Pages 270-275

  Saito, N ^a   Yamada, O ^a   Ono, T ^a   Uda, T ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRONICS PACKAGING; FAILURE ANALYSIS; FINITE ELEMENT METHOD; RELIABILITY; SEMICONDUCTOR DEVICE MANUFACTURE; STATISTICAL METHODS; STRESS ANALYSIS; TENSILE STRESS; THERMAL EXPANSION;

BALL GRID ARRAY; DESIGN OF EXPERIMENT; EQUIVALENT INELASTIC STRAIN INCLEMENT; OPTIMUM PACKAGING STRUCTURE; UNDERFILL;

FLIP CHIP DEVICES;

EID: 0034832927     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. Reliability of flip chip BGA package on organic substrate
2. Taguchi design of experiment for wafer bumping by stencil printing
3. Thermal fatigue assessment for solder joints of underfill assembly