Boosters for driving long on-chip interconnects: Design issues, interconnect synthesis and comparison with repeaters

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 2001, Pages 204-211

  Nalamalpu, A ^a   Burleson, W ^a  

^a INTEL CORPORATION   (United States)

Author keywords

Buffering; Interconnect; Methodology; Timing

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; CONSTRAINT THEORY; INTERCONNECTION NETWORKS; VLSI CIRCUITS;

BOOSTERS;

CMOS INTEGRATED CIRCUITS;

EID: 0034832423     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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