Dual-rail multiple-valued current-mode VLSI with biasing current sources

Proceedings of The International Symposium on Multiple-Valued Logic

Volumn , Issue , 2001, Pages 21-26

  Ike, T ^a   Hanyu, T ^a   Kameyama, M ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; CMOS INTEGRATED CIRCUITS; CURRENT DENSITY; DIGITAL ARITHMETIC; FORMAL LOGIC; INTEGRATED CIRCUIT LAYOUT; LOGIC CIRCUITS; SWITCHING CIRCUITS;

CURRENT MIRROR;

VLSI CIRCUITS;

EID: 0034828822     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. CMOS technology - Year 2010 and beyond
2. I-V microsystems - Scaling on schedule for personal communications
3. MOSFET technology for low-voltage/low-power applications
4. A 200 MHz pipelined multiplier using 1.5V-supply multiple-valued MOS current-mode circuits with dual-rail source-coupled logic
5. Design and implementation of a low-power multiple-valued current-mode integrated circuit with current-source control
6. Low-power dual-rail multiple-valued current-mode logic circuit using multiple input-signal levels
7. Signed-digit number representations for fast parallel arithmetic