Mixed-swing methodology for domino logic circuits

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2001, Pages 85-88

  Rave, A ^a   Carley, L R ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; CMOS INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; ELECTRIC NETWORK ANALYSIS; INTEGRATED CIRCUIT TESTING; LOGIC CIRCUITS; PERFORMANCE; VOLTAGE REGULATORS;

BLOCK CARRY LOOKAHEAD ADDER; CRITICAL PATH CIRCUIT; DOMINO LOGIC CIRCUITS; MULTIPLIER-ACCUMULATOR; POWER DISSIPATION; WALLACE TREE MULTIPLIER;

MULTIPLYING CIRCUITS;

EID: 0034821498     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. Mixed-swing quadrail for low power dual-rail domino logic
2. Decreasing low-voltage manufacturing-induced delay variations with adaptive mixed-voltage-swing circuits
3. A low-power 16-bit MAC using series-regulated mixed-swing techniques
4. Compact low voltage power efficient operational amplifier cells for VLSI
5. Delta-I noise specification for a high-performance computing machine
6. Noise in digital dynamic CMOS circuits
7. Power supply noise in ICs: A crystal ball reading
8. New single-clock CMOS latches and flip-flops with improved speed and power savings