Decreasing low-voltage manufacturing-induced delay variations with adaptive mixed-voltage-swing circuits

Proceedings of the International Symposium on Low Power Design

Volumn , Issue , 1998, Pages 106-108

  Carley, L Richard ^a   Aggarwal, Akshay ^a   Krishnamurthy, Ram K ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC LOSSES; ELECTRIC POWER SUPPLIES TO APPARATUS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; SIMULATION;

ADAPTIVE MIXED VOLTAGE SWING CIRCUITS; DUMMY DELAY PATH; LOW POWER CMOS LOGIC; LOW VOLTAGE LOGIC CIRCUITS; ON CHIP SERIES REGULATOR; QUADRAIL OPERATION;

LOGIC CIRCUITS;

EID: 0031630029     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/280756.280812     Document Type: Conference Paper

References (13)