A low power media processor core performable CIF30 fr/s MPEG4/H26x video codec

IEICE Transactions on Electronics

Volumn E84-C, Issue 2, 2001, Pages 157-165

  Ohira, Hideo ^a   Kamemarljtt, Toshihisa ^a   Suzuki, Hirokazu ^a  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

Author keywords

High performance; Low power; Media processor core; Video coding; VLSI

Indexed keywords

BLOCK CODES; DATA HANDLING; ENCODING (SYMBOLS); LOGIC CIRCUITS; MULTIMEDIA SYSTEMS; REDUCED INSTRUCTION SET COMPUTING; RESPONSE TIME (COMPUTER SYSTEMS);

SINGLE INSTRUCTION MULTIPLE DATA (SIMD);

PROGRAM PROCESSORS;

EID: 0034818472     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (6)

1. T. Kamemaru, H. Ohira, H. Suzuki, K. Asano, M. Yosimoto, and T. Murakami, "Media processor core architecture for realtime, bi-directional MPEG4/H.26x codec with 30 fr/s for GIF-video," Proc. IEEE CICC2000, pp.474-476, May 2000.
2. D. Ditzel, "Transmeta's Crusoe: Low-power X86-compatible microprocessor built with software," Proc. IEICE Cool Chips III, pp.1-30, April 2000.
3. J. Heeb, "Next generation Intel strongARM technology overview," Proc. IEICE Cool Chips III, pp. 137-148, April 2000.
4. M. Takahashi, M. Hamada, T. Nishikawa, H. Arakida, Y. Tsuboi, T. Fujita, F. Hatori, S. Mita, K. Suzuki, A. Chiba, T. Terazawa, F. Sano, Y. Watanabe, H. Momose, K. Usami, M. Igarashi, T. Ishikawa, M. Kanazawa, T. Kuroda, and T. Funuyama, "A GOmW MPEG-4 video codec using clustered voltage scaling with variable supply-voltage scheme," Proc. IEEE ISSCC1998, pp.36-37, 1998.
5. S. Kurohmaru, M. Matsuo, H. Nakajima, Y. Kohashi, T. Yonezawa, T. Moriiwa, M. Ohashi, M. Toujima, T. Nakamura, M. Hamada, T. Hashimoto, H. Fujimoto, Y. lizaka, J. Michiyama, and H. Komori, "A MPEG4 programmable codec DSP with an embedded pre/postprocessing engine," Proc. IEEE CICC 1999, pp.69-72, 1999.
6. M. Harrand, J. Sanches, A. Bellon, J. Bulone, A. Tournier, O. Deygas, J. Herlusion, D. Doise, and E. Berrebi, "A single-chip GIF 30 Hz H2G1, H2G3 and H263+ video encoder/decoder with embedded display controller," Proc. IEEE ISSCC1999, pp.268-269, 1999.