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Volumn , Issue , 2000, Pages 473-476

Media processor core architecture for realtime, bi-directional MPEG4/H.26X codec with 30 fr/s for CIF-video

Author keywords

[No Author keywords available]

Indexed keywords

DECODING; ELECTRIC POWER SUPPLIES TO APPARATUS; IMAGE CODING; IMAGE SEGMENTATION; LSI CIRCUITS; REAL TIME SYSTEMS; REDUCED INSTRUCTION SET COMPUTING; SILICON WAFERS; STANDARDS;

EID: 0033712919     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (9)

References (4)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.