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Volumn , Issue , 2000, Pages 473-476
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Media processor core architecture for realtime, bi-directional MPEG4/H.26X codec with 30 fr/s for CIF-video
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Author keywords
[No Author keywords available]
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Indexed keywords
DECODING;
ELECTRIC POWER SUPPLIES TO APPARATUS;
IMAGE CODING;
IMAGE SEGMENTATION;
LSI CIRCUITS;
REAL TIME SYSTEMS;
REDUCED INSTRUCTION SET COMPUTING;
SILICON WAFERS;
STANDARDS;
MEMORY REDUCTION;
MOTION PICTURE EXPERTS GROUP;
SINGLE INPUT MULTIPLE DATA PROCESSOR;
MICROPROCESSOR CHIPS;
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EID: 0033712919
PISSN: 08865930
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (9)
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References (4)
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