Methods for optimizing register placement in synchronous circuits derived using software pipelining techniques

Proceedings of the International Symposium on System Synthesis

Volumn , Issue , 2001, Pages 209-214

  Chabini, N ^a   Savaria, Y ^a  

^a UNIVERSITÉ DE MONTRÉAL   (Canada)

Author keywords

Linear program; Mono phase; Multi phase; Network flow; Register; Retiming; Scheduling; Sequential circuits; Software pipelining

Indexed keywords

ALGORITHMS; COMPUTER SOFTWARE; LINEAR PROGRAMMING; PIPELINE PROCESSING SYSTEMS; SCHEDULING;

MULTI-PHASE SEQUENTIAL CIRCUITS;

SEQUENTIAL CIRCUITS;

EID: 0034796802     PISSN: 10801820     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/500001.500052     Document Type: Conference Paper

References (17)

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