CMOS RF low-noise amplifier design for wireless communication

Midwest Symposium on Circuits and Systems

Volumn 3, Issue , 2000, Pages 1306-1309

  Li, Qiang ^a   Yuan, Jiann S ^a  

^a University of Central Florida   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; MATHEMATICAL MODELS; MOSFET DEVICES; OPTIMIZATION; SIGNAL TO NOISE RATIO; THERMAL NOISE; TRANSCONDUCTANCE; WIRELESS TELECOMMUNICATION SYSTEMS;

LOW NOISE AMPLIFIER; NOISE PARAMETERS; POWER CONSUMPTION;

AMPLIFIERS (ELECTRONIC);

EID: 0034466867     PISSN: 15483746     EISSN: None     Source Type: Journal    
DOI: 10.1109/MWSCAS.2000.951455     Document Type: Article

References (11)

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3. A 1.5V, 1.5GHz CMOS low noise amplifier
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5. 4- and 13-GHz tuned amplifiers implemented in a 0.1-um CMOS technology on SOI, SOS, and bulk substrates
6. Design of a 1.5V CMOS integrated 3GHz LNA
7. Microwave CMOS - Device physics and design
8. High frequency application of MOS compact model and their development for scalable RF model libraries
9. An effective gate resistance model for CMOS RF and noise modeling