The impact of scaling down to deep submicron on CMOS RF circuits

IEEE Journal of Solid-State Circuits

Volumn 33, Issue 7, 1998, Pages 1023-1036

  Huang, Qiuting ^a,g   Piazza, Francesco ^a,c   Orsatti, Paolo ^a,c   Ohguro, Tatsuya ^b,d,e,f  

^a ETH ZURICH   (Switzerland)

^b TOSHIBA CORPORATION   (Japan)

^c Integrated Systems Laboratory   (Switzerland)

^d HOKKAIDO UNIVERSITY   (Japan)

^e Microelectrics Eng Laboratory   (Japan)

^f JAPAN SOCIETY OF APPLIED PHYSICS   (Japan)

^g IEEE   (Switzerland)

Author keywords

CMOS RF; Low noise amplifier; Low power design; Mixer; Prescaler; RF IC; Technology scaling; Wireless communication

Indexed keywords

TECHNOLOGY SCALING;

BOUNDARY CONDITIONS; CELLULAR RADIO SYSTEMS; INTEGRATED CIRCUIT LAYOUT; MIXER CIRCUITS; RADIO FREQUENCY AMPLIFIERS;

CMOS INTEGRATED CIRCUITS;

EID: 0032123968     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.701249     Document Type: Article

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