Junction termination technique for super junction devices

IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD)

Volumn , Issue , 2000, Pages 257-261

  Bai, Y ^a   Huang, A Q ^a   Li, X ^a  

^a VIRGINIA POLYTECHNIC INSTITUTE AND STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC BREAKDOWN; ELECTRIC CURRENTS; ELECTRIC FIELDS; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DOPING;

JUNCTION TERMINATION TECHNIQUE; ONE-DIMENSIONAL ELECTRIC FIELD DISTRIBUTION; SUPER JUNCTION DEVICE; VOLTAGE RATING DEVICE;

SEMICONDUCTOR JUNCTIONS;

EID: 0034447741     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. Power semiconductor devices
2. Simulated superior performances of semiconductor superjunction devices
3. COOLMOS™-a new milestone in high voltage power MOS
4. High-voltage device termination techniques-a comparative review