Resynchronization for multiprocessor DSP systems

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 47, Issue 11, 2000, Pages 1597-1609

  Bhattacharyya, Shuvra S ^a,b,c,d   Sriram, Sundararajan ^a,b,c,d   Lee Edward, A ^a,b,c,d  

^a IEEE   (United States)

^b UNIVERSITY OF MARYLAND   (United States)

^c TEXAS INSTRUMENTS   (United States)

^d UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER SIMULATION; DATA FLOW ANALYSIS; FIELD PROGRAMMABLE GATE ARRAYS; MULTIPROCESSING SYSTEMS; REAL TIME SYSTEMS; SYNCHRONIZATION; VLSI CIRCUITS;

EMBEDDED MULTIPROCESSORS; ITERATIVE DATAFLOW GRAPHS; RESYNCHRONIZATION; SELF TIMED SYSTEMS; SET COVERING; SHARED MEMORY SYSTEMS;

DIGITAL SIGNAL PROCESSING;

EID: 0034313633     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/81.895327     Document Type: Article

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