Testing SRAM-based content addressable memories

IEEE Transactions on Computers

Volumn 49, Issue 10, 2000, Pages 1054-1063

  Zhao, J ^b   Irrinki, S ^c   Puri, M ^c   Lombardi, F ^a,d  

^a IEEE   (United States)

^b TEXAS A AND M UNIVERSITY   (United States)

^c AGERE SYSTEMS   (United States)

^d Northeastern University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FAULT DETECTION; FAULT MODELING; MARCH C ALGORITHM; MEMORY TESTING; NONCONCURRENT DETECTION ALGORITHM; STATIC RANDOM ACCESS MEMORIES;

ALGORITHMS; ASSOCIATIVE STORAGE; COMPUTER SIMULATION; ERROR DETECTION; FAILURE ANALYSIS; RANDOM ACCESS STORAGE; TRANSISTORS;

COMPUTER SYSTEM RECOVERY;

EID: 0034290957     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.888041     Document Type: Article

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