Approach to modeling and testing memories and its application to CAMs

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1998, Pages 411-416

  Sidorowicz, P R ^a   Brzozowski, J A ^a  

^a UNIVERSITY OF WATERLOO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ASSOCIATIVE STORAGE; DESIGN FOR TESTABILITY; ELECTRIC FAULT LOCATION; INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS; SIMULATION;

FAULT MODELS;

DATA STORAGE EQUIPMENT;

EID: 0032309134     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)