1.5 W single-chip MPEG2 MPML encoder with low-power motion estimation and clocking

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 40, Issue , 1997, Pages 256-257

  Mizuno, Masayuki ^a   Ooi, Yasushi ^a   Hayashi, Naoya ^a   Goto, Junichi ^a   Hozumi, Masatoshi ^a   Furuta, Koichiro ^a   Nakazawa, Yoetsu ^a   Ohnishi, Osamu ^a   Yokoyama, Yutaka ^a   Katayama, Yoichi ^a   Takano, Hideto ^a   Miki, Noriyuki ^a   Senda, Yuzo ^a   Tamitani, Ichiro ^a   Yamashina, Masakazu ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; COMPUTER AIDED LOGIC DESIGN; ENERGY DISSIPATION; FREQUENCY RESPONSE; IMAGE CODING; LSI CIRCUITS; MICROPROCESSOR CHIPS; MOTION CONTROL; PIPELINE PROCESSING SYSTEMS; TIMING CIRCUITS;

DEMAND CLOCK CONTROLLERS (DCC); LOCAL CLOCK CONTROLLERS (LCC); MOTION ESTIMATION (ME); SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM);

DIGITAL IMAGE STORAGE;

EID: 0031070306     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)