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Volumn 2, Issue , 1995, Pages 1228-1231
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Efficient VLSI architecture for new three-step search algorithm
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
IMAGE COMPRESSION;
INTEGRATED CIRCUIT LAYOUT;
SYSTOLIC ARRAYS;
CHECKING POINTS;
CHECKING VECTORS;
NEW THREE STEP SEARCH ALGORITHM;
VLSI CIRCUITS;
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EID: 0029457683
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (24)
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References (7)
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