Buried oxide properties in oxygen plasma-enhanced low-temperature wafer bonding

Journal of the Electrochemical Society

Volumn 147, Issue 7, 2000, Pages 2754-2756

  Wu, Y H ^a   Huang, C H ^a   Chen, W J ^b   Lin, C N ^a,c   Chin, Albert ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b Dept of Mech Materials Engineering   (Taiwan)

^c UNITED MICROELECTRONICS CORPORATION   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BOND STRENGTH (MATERIALS); CAPACITANCE MEASUREMENT; INTERFACES (MATERIALS); PLASMA APPLICATIONS; SCANNING ELECTRON MICROSCOPY; SILICON WAFERS; TRANSMISSION ELECTRON MICROSCOPY; VOLTAGE MEASUREMENT;

BURIED OXIDE; PLASMA-ENHANCED WAFER BONDING;

SILICON ON INSULATOR TECHNOLOGY;

EID: 0034224590     PISSN: 00134651     EISSN: None     Source Type: Journal    
DOI: 10.1149/1.1393601     Document Type: Article

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