Effects of denudation anneal of silicon wafer on the characteristics of ultra large-scale integration devices

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 39, Issue 6 A, 2000, Pages 3277-3280

  Cho, Won Ju ^a,c   Kuwano, Hiroshi ^b  

^a R and D Division   (South Korea)

^b KEIO UNIVERSITY   (Japan)

^c ELECTROTECHNICAL LABORATORY   (Japan)

Author keywords

Bulk microdefects; Denudation anneals; Gate oxide breakdown; Junction leakage; Refresh time

Indexed keywords

ANNEALING; CRYSTAL ATOMIC STRUCTURE; CRYSTAL DEFECTS; DIFFUSION; DYNAMIC RANDOM ACCESS STORAGE; ELECTRIC BREAKDOWN OF SOLIDS; GATES (TRANSISTOR); LEAKAGE CURRENTS; SEMICONDUCTOR DIODES; SEMICONDUCTOR JUNCTIONS; SILICON WAFERS; THERMAL EFFECTS;

DEFECT-FREE ZONES (DFZ); DENUDATION ANNEALING; MICRODEFECTS; OUTDIFFUSION;

ULSI CIRCUITS;

EID: 0034204723     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.39.3277     Document Type: Article

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