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Volumn 12, Issue 1, 2000, Pages 35-39

3D Si-on-Si stack packaging

Author keywords

[No Author keywords available]

Indexed keywords

FLIP CHIP DEVICES; MULTICHIP MODULES; SEMICONDUCTING FILMS; SILICON WAFERS; STRAIN; STRESS ANALYSIS; SURFACE MOUNT TECHNOLOGY; THIN FILMS;

EID: 0033899719     PISSN: 09540911     EISSN: None     Source Type: Journal    
DOI: 10.1108/09540910010312429     Document Type: Article
Times cited : (2)

References (11)
  • 4
    • 85037951980 scopus 로고    scopus 로고
    • Garrou, E.P. and Turlik, I. (Eds), McGraw-Hill Publishers, New York, NY, chapter 6, Fig. 6.4
    • Crowley, R. (1998), in Garrou, E.P. and Turlik, I. (Eds), Multichip Module Technology Handbook, McGraw-Hill Publishers, New York, NY, chapter 6, Fig. 6.4.
    • (1998) Multichip Module Technology Handbook
    • Crowley, R.1
  • 10
    • 0343761669 scopus 로고    scopus 로고
    • 3-D packaging
    • Garrou, E.P. and Turlik, I. (Eds), McGraw-Hill Publishers, New York, NY, chapter 6
    • Val, C. (1998), "3-D packaging", in Garrou, E.P. and Turlik, I. (Eds), Multichip Module Technology Handbook, McGraw-Hill Publishers, New York, NY, chapter 6, pp. 6.1.
    • (1998) Multichip Module Technology Handbook , pp. 61
    • Val, C.1
  • 11
    • 0005256236 scopus 로고
    • The 3-D interconnection-applications for multichip modules vertical, MCM-V
    • ISHM, Florida, October
    • Val, C. and Leroy, M. (1991), "The 3-D interconnection-applications for multichip modules vertical, MCM-V", in Proceedings of the International Symposium on Microelectronics, ISHM, Florida, October, p. 62-8.
    • (1991) Proceedings of the International Symposium on Microelectronics , pp. 62-68
    • Val, C.1    Leroy, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.