Power reduction in self-timed circuits using early-open latch controllers

Electronics Letters

Volumn 36, Issue 2, 2000, Pages 115-116

  Riocreux, P A ^a   Lewis, M J G ^a   Brackenbury, L E M ^a  

^a UNIVERSITY OF MANCHESTER   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

LOGIC CIRCUITS;

EARLY OPEN LATCH CONTROLLERS; SELF-TIMED MICROPIPELINE CIRCUITS;

FLIP FLOP CIRCUITS;

EID: 0033873032     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20000178     Document Type: Article

References (4)

1. SUTHERLAND, I.E.: 'Micropipelines', Commun. ACM, 1989, 32, (6), pp. 720-738
2. FURBER, S.B., and DAY, P.: 'Four-phase micropipeline latch control circuits', IEEE Trans. VLSI Syst., 1996, 4, (2), pp. 247-253
3. LEWIS, M., GARSIDE, J.D., and BRACKENBURY, L.: 'Reconfigurable latch controllers for low power asynchronous circuits'. Proc. Async'99, April 1999, (IEEE Computer Society Press), pp. 27-35
4. LIU, J.: 'Arithmetic and control components for an asynchronous microprocessor'. PhD thesis, University of Manchester, 1997