Reconfigurable latch controllers for low power asynchronous circuits

Proceedings - International Symposium on Asynchronous Circuits and Systems

Volumn , Issue , 1999, Pages 27-35

  Lewis, M ^a   Garside, J ^a   Brackenbury, L ^a  

^a UNIVERSITY OF MANCHESTER   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS CIRCUITS; DATA PATHS; LOW POWER; MAXIMUM THROUGH-PUT; MICROPIPELINE; NEW DESIGN; OPERATING MODES; PIPELINED MULTIPLIERS; POWER CONSUMPTION; POWER REDUCTIONS; RE-CONFIGURABLE; TYPICAL APPLICATION;

CONTROLLERS; PIPELINE PROCESSING SYSTEMS;

FLIP FLOP CIRCUITS;

EID: 77957965192     PISSN: 15228681     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASYNC.1999.761520     Document Type: Conference Paper

References (10)

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