-
1
-
-
0024612207
-
Performance of Multiprocessor Interconnection Networks
-
Feb.
-
L.N. Bhuyan, Q. Yang, and D.P. Agrawal, "Performance of Multiprocessor Interconnection Networks," Computer, vol. 22, no. 2, pp. 25-37, Feb. 1989.
-
(1989)
Computer
, vol.22
, Issue.2
, pp. 25-37
-
-
Bhuyan, L.N.1
Yang, Q.2
Agrawal, D.P.3
-
2
-
-
0030846980
-
Performance of Multistage Bus Networks for a Distributed Shared Memory Multiprocessor
-
Jan.
-
L.N. Bhuyan, R.R. Iyer, T. Askar, A.K. Nanda, and M. Kumar, "Performance of Multistage Bus Networks for a Distributed Shared Memory Multiprocessor," IEEE Trans. Parallel and Distributed Systems, vol. 8, no. 1, pp. 82-95, Jan. 1997.
-
(1997)
IEEE Trans. Parallel and Distributed Systems
, vol.8
, Issue.1
, pp. 82-95
-
-
Bhuyan, L.N.1
Iyer, R.R.2
Askar, T.3
Nanda, A.K.4
Kumar, M.5
-
3
-
-
0003593032
-
-
Technical Report MIT/LCS/TR-516, Massachusetts Institute of Technology, Cambridge, Mass., Sept.
-
E.A. Brewer, C.N. Dellarocas, A. Colbrook, and W.E. Weihl, "Proteus: A High-Performance Parallel-Architecture Simulator," Technical Report MIT/LCS/TR-516, Massachusetts Institute of Technology, Cambridge, Mass., Sept. 1991.
-
(1991)
Proteus: a High-Performance Parallel-Architecture Simulator
-
-
Brewer, E.A.1
Dellarocas, C.N.2
Colbrook, A.3
Weihl, W.E.4
-
5
-
-
0018152817
-
A New Solution to Coherence Problems in Multicache Systems
-
Dec.
-
L.M. Censier and P. Feautrier, "A New Solution to Coherence Problems in Multicache Systems," IEEE Trans. Computers, vol. 27, no. 12, pp. 1,112-1,118, Dec. 1978.
-
(1978)
IEEE Trans. Computers
, vol.27
, Issue.12
-
-
Censier, L.M.1
Feautrier, P.2
-
6
-
-
0025437119
-
Directory-Based Cache Coherence in Large Scale Multiprocessors
-
June
-
D. Chaiken et al., "Directory-Based Cache Coherence in Large Scale Multiprocessors," Computer, vol. 23, no. 6, pp. 49-58, June 1990.
-
(1990)
Computer
, vol.23
, Issue.6
, pp. 49-58
-
-
Chaiken, D.1
-
8
-
-
0029701756
-
Evaluating Virtual Channels for Cache Coherent Shared Memory Multiprocessors
-
May
-
A. Kumar and L.N. Bhuyan, "Evaluating Virtual Channels for Cache Coherent Shared Memory Multiprocessors," ACM Int'l Conf. Supercomputing, May 1996.
-
(1996)
ACM Int'l Conf. Supercomputing
-
-
Kumar, A.1
Bhuyan, L.N.2
-
9
-
-
84976836384
-
Experimental Comparisons of Memory Management Policies for NUMA Multiprocessors
-
Nov.
-
R.P. Larowe and C.S. Ellis, "Experimental Comparisons of Memory Management Policies for NUMA Multiprocessors," ACM Trans. Computer Systems, vol. 9, no. 4, pp. 319-363, Nov. 1991.
-
(1991)
ACM Trans. Computer Systems
, vol.9
, Issue.4
, pp. 319-363
-
-
Larowe, R.P.1
Ellis, C.S.2
-
10
-
-
0027269147
-
{The DASH Prototype: Logic Overhead and Performance
-
Jan
-
D. Lenoski et al., "{The DASH Prototype: Logic Overhead and Performance," IEEE Trans. Parallel and Distributed Systems, vol. 4, no. 1, pp. 41-61, Jan 1993.
-
(1993)
IEEE Trans. Parallel and Distributed Systems
, vol.4
, Issue.1
, pp. 41-61
-
-
Lenoski, D.1
-
11
-
-
0027662358
-
Cache Coherence in Large Scale Shared Memory Multiprocessors
-
Sept.
-
D.J. Lilja, "Cache Coherence in Large Scale Shared Memory Multiprocessors," ACM Computing Surveys, vol. 25, no. 3, pp. 303-338, Sept. 1993.
-
(1993)
ACM Computing Surveys
, vol.25
, Issue.3
, pp. 303-338
-
-
Lilja, D.J.1
-
14
-
-
0024716521
-
Dynamic Page Migration in Multiprocessors with Distributed Global Memory
-
Aug.
-
C. Scheurich and M. Dubois, "Dynamic Page Migration in Multiprocessors with Distributed Global Memory," IEEE Trans. Computers, vol. 38, no. 8, Aug. 1989.
-
(1989)
IEEE Trans. Computers
, vol.38
, Issue.8
-
-
Scheurich, C.1
Dubois, M.2
-
15
-
-
0002255264
-
SPLASH: Stanford Parallel Applications for Shared-Memory
-
Mar.
-
J.P. Singh, W.-D. Weber, and A. Gupta, "SPLASH: Stanford Parallel Applications for Shared-Memory," ACM SIGARCH Computer Architecture News, vol. 20, no. 1, pp. 5-44, Mar. 1992.
-
(1992)
ACM SIGARCH Computer Architecture News
, vol.20
, Issue.1
, pp. 5-44
-
-
Singh, J.P.1
Weber, W.-D.2
Gupta, A.3
-
16
-
-
0031117384
-
The Performance of the Cedar Multistage Switching Network
-
Apr.
-
J. Torrellas and Z. Zheng, "The Performance of the Cedar Multistage Switching Network," IEEE Trans. Parallel and Distributed Systems, vol. 8, no. 4, pp. 321-336, Apr. 1997.
-
(1997)
IEEE Trans. Parallel and Distributed Systems
, vol.8
, Issue.4
, pp. 321-336
-
-
Torrellas, J.1
Zheng, Z.2
-
17
-
-
0030654244
-
Performance Benefits of Virtual Channels and Adaptive Routing: An Application-Driven Study
-
July
-
A. Vaidya, A. Sivasubramaniam, and C. Das, "Performance Benefits of Virtual Channels and Adaptive Routing: An Application-Driven Study," Proc. 11th Int'l Conf. Supercomputing, July 1997.
-
(1997)
Proc. 11th Int'l Conf. Supercomputing
-
-
Vaidya, A.1
Sivasubramaniam, A.2
Das, C.3
-
18
-
-
17044405973
-
Operating System Support for Improving Data Locality on CC-NUMA Computer Servers
-
Oct.
-
B. Vergese et al., "Operating System Support for Improving Data Locality on CC-NUMA Computer Servers," Proc. ASPLOS-VII, pp. 279-289, Oct. 1996.
-
(1996)
Proc. ASPLOS-VII
, pp. 279-289
-
-
Vergese, B.1
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