Performance of multistage bus networks for a distributed shared memory multiprocessor

IEEE Transactions on Parallel and Distributed Systems

Volumn 8, Issue 1, 1997, Pages 82-95

  Bhuyan, Laxmi N ^a,b   Iyer, Ravi R ^b   Askar, Tahsin ^c   Nanda, Ashwini K ^a,d   Kumar, Mohan ^a,e  

^a IEEE

^b TEXAS A AND M UNIVERSITY   (United States)

^c ADVANCED MICRO DEVICES   (United States)

^d IBM T J WATSON RESEARCH CENTER   (United States)

^e CURTIN UNIVERSITY   (Australia)

Author keywords

Execution driven simulation; Interconnection network; Packet switching; Performance analysis; Queuing model; Routing

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; COMPUTER SIMULATION; DISTRIBUTED COMPUTER SYSTEMS; HIERARCHICAL SYSTEMS; PACKET SWITCHING; PERFORMANCE;

MULTISTAGE BUS NETWORK (MBN); MULTISTAGE INTERCONNECTION NETWORKS (MINS); QUEUEING MODEL;

INTERCONNECTION NETWORKS;

EID: 0030846980     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/71.569657     Document Type: Article

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