The performance of the cedar multistage switching network

IEEE Transactions on Parallel and Distributed Systems

Volumn 8, Issue 4, 1997, Pages 321-336

  Torrellas, Josep ^a,b   Zhang, Zheng ^b  

^a IEEE   (United States)

^b UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

Address tracing; Experimental analysis; Multistage switching networks; Performance evaluation; Vector multiprocessors

Indexed keywords

DATA COMMUNICATION SYSTEMS; OPTIMIZATION; REAL TIME SYSTEMS; RESPONSE TIME (COMPUTER SYSTEMS); SWITCHING NETWORKS;

CEDAR MULTISTAGE SWITCHING NETWORKS; HARDWARE PROBES; VECTOR MULTIPROCESSORS;

MULTIPROCESSING SYSTEMS;

EID: 0031117384     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/71.588598     Document Type: Article

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