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Volumn 47, Issue 9 PART 2, 1999, Pages 1819-1825

Modeling of interconnections and isolation within a multilayered ball grid array package

Author keywords

BGA; Electrical isolation; Microwave packaging; Multichip module; Package isolation; Package model

Indexed keywords

ELECTRIC ISOLATION; MULTILAYERED BALL GRID ARRAY (BGA) PACKAGES; PACKAGE ISOLATION;

EID: 0033360282     PISSN: 00189480     EISSN: None     Source Type: Journal    
DOI: 10.1109/22.788517     Document Type: Article
Times cited : (37)

References (10)
  • 1
    • 0031212223 scopus 로고    scopus 로고
    • Chip-scale packaging, vol. 34, pp. 36-43, Aug. 1997.
    • P. Thompson, Chip-scale packaging, IEEE Spectrum Mag., vol. 34, pp. 36-43, Aug. 1997.
    • IEEE Spectrum Mag.
    • Thompson, P.1
  • 7
    • 0031251281 scopus 로고    scopus 로고
    • Modeling millimeter-wave IC behavior for flip-chip mounting schemes, vol. 45, pp. 1919-1925, Oct. 1998.
    • R. W. Jackson and R. Ito, Modeling millimeter-wave IC behavior for flip-chip mounting schemes, IEEE Trans. Microwave Theory Tech., vol. 45, pp. 1919-1925, Oct. 1998.
    • IEEE Trans. Microwave Theory Tech.
    • Jackson, R.W.1    Ito, R.2
  • 9
    • 0027554616 scopus 로고    scopus 로고
    • The use of side wall images to compute package effects in MoM analysis of MMIC circuits, vol. 41, pp. 406-414, Mar. 1993.
    • R. W. Jackson, The use of side wall images to compute package effects in MoM analysis of MMIC circuits, IEEE Trans. Microwave Theory Tech., vol. 41, pp. 406-414, Mar. 1993.
    • IEEE Trans. Microwave Theory Tech.
    • Jackson, R.W.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.