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Volumn 22, Issue 4, 1999, Pages 580-585

Manufacturing of solder bumps with Cu/Ta/Cu as under bump metallurgy

Author keywords

[No Author keywords available]

Indexed keywords

COPPER; ELECTROPLATING; FLIP CHIP DEVICES; INTERDIFFUSION (SOLIDS); METALLURGY; SEMICONDUCTING ALUMINUM COMPOUNDS; SEMICONDUCTING SILICON; SOLDERED JOINTS; SPUTTER DEPOSITION; TANTALUM;

EID: 0033356408     PISSN: 15213323     EISSN: None     Source Type: Journal    
DOI: 10.1109/6040.803449     Document Type: Article
Times cited : (3)

References (18)
  • 1
    • 33749967685 scopus 로고    scopus 로고
    • J. H. Lau, Ed. New York: McGraw-Hill, ch. 1.
    • Flip Chip Technologies, J. H. Lau, Ed. New York: McGraw-Hill, 1996, ch. 1.
    • (1996) Flip Chip Technologies
  • 6
    • 0025539385 scopus 로고
    • Reliability improvements in solder bump processing for flip chips in
    • Las Vegas, NV, May 20-23
    • M. Warrior, Reliability improvements in solder bump processing for flip chips in Proc. Electron. Comp. Conf., ECC, Las Vegas, NV, May 20-23, 1990, vol. 1, pp. 460-469.
    • (1990) Proc. Electron. Comp. Conf., ECC , vol.1 , pp. 460-469
    • Warrior, M.1
  • 7
    • 0025394627 scopus 로고
    • Solder bump formation using electroless plating and ultrasonic soldering
    • Mar.
    • M. Inaba, K. Yamakawa, and N. Iwase, Solder bump formation using electroless plating and ultrasonic soldering IEEE Trans. Comp., Hybrids, Manufact. Technol., vol. 13, pp. 119-123, Mar. 1990.
    • (1990) IEEE Trans. Comp., Hybrids, Manufact. Technol. , vol.13 , pp. 119-123
    • Inaba, M.1    Yamakawa, K.2    Iwase, N.3
  • 8
    • 0024735644 scopus 로고
    • Selective electroless copper for VLSI interconnection
    • P. L. Pai and C. H. Ting, Selective electroless copper for VLSI interconnection IEEE Electron Device Lett., vol. 10, pp. 423125, 1989.
    • (1989) IEEE Electron Device Lett. , vol.10 , pp. 423125
    • Pai, P.L.1    Ting, C.H.2
  • 9
    • 0025510995 scopus 로고
    • On-chip wiring for VLSI: Status and directions
    • M. B. Small and D. J. Pearson, On-chip wiring for VLSI: Status and directions IBM J. Res. Develop., vol. 34, pp. 858-867, 1990.
    • (1990) IBM J. Res. Develop. , vol.34 , pp. 858-867
    • Small, M.B.1    Pearson, D.J.2
  • 10
    • 0000899113 scopus 로고
    • Tantalum-based diffusion barriers in Si/Cu VLSI metallizations
    • E. Kolawa, J. S. Chen, J. S. Reid, P. J. Pokela, and M. A. Nicolet, Tantalum-based diffusion barriers in Si/Cu VLSI metallizations J. Appl. Phys., vol. 70, no. 3, pp. 1369-1373, 1991.
    • (1991) J. Appl. Phys. , vol.70 , Issue.3 , pp. 1369-1373
    • Kolawa, E.1    Chen, J.S.2    Reid, J.S.3    Pokela, P.J.4    Nicolet, M.A.5
  • 14
    • 0000684975 scopus 로고
    • Tantalum as a diffusion barrier between copper and silicon
    • K. Holloway and P. M. Fryer, Tantalum as a diffusion barrier between copper and silicon Appl. Phys. Lett., vol. 57, no. 17, pp. 1736-1738, 1990.
    • (1990) Appl. Phys. Lett. , vol.57 , Issue.17 , pp. 1736-1738
    • Holloway, K.1    Fryer, P.M.2
  • 16
    • 0030285449 scopus 로고    scopus 로고
    • Approaching a uniform bump height of the electroplated solder bumps on a silicon wafer
    • Dec.
    • K. L. Lin and S. Y. Chang, Approaching a uniform bump height of the electroplated solder bumps on a silicon wafer IEEE Trans. Comp., Packag., Manufact. Technol. B, vol. 19, pp. 747-751, Dec. 1996.
    • (1996) IEEE Trans. Comp., Packag., Manufact. Technol. B , vol.19 , pp. 747-751
    • Lin, K.L.1    Chang, S.Y.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.