Effect of noise on analog circuit testing

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 15, Issue 1, 1999, Pages 11-22

  Iyer, Madhu K ^a,b,c   Bushnell, Michael L ^b  

^a University of California   (United States)

^b RUTGERS UNIVERSITY   (United States)

^c UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; FREQUENCY DOMAIN ANALYSIS; LINEAR INTEGRATED CIRCUITS; MONTE CARLO METHODS; SEMICONDUCTOR DEVICE MODELS; SPURIOUS SIGNAL NOISE; TIME DOMAIN ANALYSIS;

ANALOG CIRCUIT TESTING; CIRCUIT-UNDER-TEST (CUT);

INTEGRATED CIRCUIT TESTING;

EID: 0033356074     PISSN: 09238174     EISSN: None     Source Type: Journal    
DOI: 10.1023/a:1008343108840     Document Type: Article

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