Test generation for mixed-signal devices using signal flow graphs

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 1996, Pages 242-248

  Ramadoss, Rajesh ^a   Bushnell, Michael L ^a  

^a RUTGERS UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; COMPUTER SIMULATION; DIGITAL INTEGRATED CIRCUITS; FAILURE ANALYSIS; GRAPH THEORY; LINEAR INTEGRATED CIRCUITS; NONLINEAR NETWORKS;

ANALOG BACKTRACE METHOD; CIRCUIT OUTPUT TOLERANCES; MIXED SIGNAL CIRCUITS; MIXED SIGNAL DEVICES; REVERSE SIMULATION; SIGNAL FLOW GRAPHS; TEST GENERATION;

INTEGRATED CIRCUIT TESTING;

EID: 0029702514     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)