Advanced characterization method for sub-micron DRAM cell transistors

IEICE Transactions on Electronics

Volumn E82-C, Issue 4, 1999, Pages 618-623

  Kurachi, Ikuo ^a  

^a OKI ELECTRIC INDUSTRY CO   (Japan)

Author keywords

Cell transistors; DRAM; Parameter extraction; Parasitic resistance; Test structure

Indexed keywords

CMOS INTEGRATED CIRCUITS; CURRENT VOLTAGE CHARACTERISTICS; DYNAMIC RANDOM ACCESS STORAGE; ELECTRIC CURRENT MEASUREMENT; ELECTRIC RESISTANCE; GATES (TRANSISTOR); THRESHOLD VOLTAGE; TRANSISTORS; VOLTAGE MEASUREMENT;

CELL TRANSISTOR; DRAIN CURRENT MEASUREMENT; PARASITIC RESISTANCE;

SEMICONDUCTOR DEVICE STRUCTURES;

EID: 0033339859     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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