-
1
-
-
0026116572
-
RSFQ logic/memory family: A new Josephson-junction technology for sub-terahertz-clock frequency digital systems
-
K. K. Likharev and V. K. Semenov, "RSFQ logic/memory family: A new Josephson-junction technology for sub-terahertz-clock frequency digital systems," IEEE Trans. Appl. Superconduct., vol. 1, pp. 3-28, 1991.
-
(1991)
IEEE Trans. Appl. Superconduct.
, vol.1
, pp. 3-28
-
-
Likharev, K.K.1
Semenov, V.K.2
-
2
-
-
0042506982
-
Design and operation of RSFQ circuits for digital signal processing
-
Nagoya, Japan, Sept.
-
O. A. Mukhanov, P. D. Bradley, S. B. Kaplan, S. V. Rylov, and A. F. Kirichenko, "Design and operation of RSFQ circuits for digital signal processing," in Proc. 5th Int. Superconduct. Electron. Conf., Nagoya, Japan, Sept. 1995, pp. 27-30.
-
(1995)
Proc. 5th Int. Superconduct. Electron. Conf.
, pp. 27-30
-
-
Mukhanov, O.A.1
Bradley, P.D.2
Kaplan, S.B.3
Rylov, S.V.4
Kirichenko, A.F.5
-
3
-
-
0032653090
-
Tools for the computer-aided design of multi-gigahertz superconducting digital circuits
-
Mar.
-
K. Gaj et al., "Tools for the computer-aided design of multi-gigahertz superconducting digital circuits," IEEE Trans. Appl. Superconduct., vol. 9, pp. 18-38, Mar. 1999.
-
(1999)
IEEE Trans. Appl. Superconduct.
, vol.9
, pp. 18-38
-
-
Gaj, K.1
-
7
-
-
0031162124
-
Time-to-digital convereters based on RSFQ digital counters
-
June
-
O. A. Mukhanov and S. V. Rylov, "Time-to-digital convereters based on RSFQ digital counters," IEEE Trans. Appl. Superconduct., vol. 7, pp. 2669-2672, June 1997.
-
(1997)
IEEE Trans. Appl. Superconduct.
, vol.7
, pp. 2669-2672
-
-
Mukhanov, O.A.1
Rylov, S.V.2
-
8
-
-
0000353776
-
Decimation filters based on RSFQ logic/memory cells
-
V. K. Semenov, Y. A. Polyakov, and A. Ryzhikh, "Decimation filters based on RSFQ logic/memory cells," Ext. Abs. ISEC'97, 1997, pp. 344-346.
-
(1997)
Ext. Abs. ISEC'97
, pp. 344-346
-
-
Semenov, V.K.1
Polyakov, Y.A.2
Ryzhikh, A.3
-
9
-
-
0031167081
-
RSFQ microprocessor: New design approaches
-
June
-
P. Bunyk, A. Y. Kidiyarova-Shevchenko, and P. Litskevitch "RSFQ microprocessor: New design approaches," IEEE Trans. Appl. Superconduct, vol. 7, pp. 2697-2704, June 1997.
-
(1997)
IEEE Trans. Appl. Superconduct
, vol.7
, pp. 2697-2704
-
-
Bunyk, P.1
Kidiyarova-Shevchenko, A.Y.2
Litskevitch, P.3
-
10
-
-
0002702772
-
Superconductors speed up computation
-
May
-
K. K. Likharev, "Superconductors speed up computation," Physics World, May 1997, pp. 39-43.
-
(1997)
Physics World
, pp. 39-43
-
-
Likharev, K.K.1
-
11
-
-
0031168007
-
Functional modeling of RSFQ circuits using Verilog HDL
-
June
-
K. Gaj, C.-H. Cheah, E. G. Friedman, and M. J. Feldman, "Functional modeling of RSFQ circuits using Verilog HDL," IEEE Trans. Appl. Superconduct., vol. 7, pp. 3151-3154, June 1997.
-
(1997)
IEEE Trans. Appl. Superconduct.
, vol.7
, pp. 3151-3154
-
-
Gaj, K.1
Cheah, C.-H.2
Friedman, E.G.3
Feldman, M.J.4
-
12
-
-
0029326363
-
Multiparameter optimization of RSFQ circuits using the method of inscribed hyperspheres
-
June
-
Q. P. Herr and M. J. Feldman, "Multiparameter optimization of RSFQ circuits using the method of inscribed hyperspheres," IEEE Trans. Appl. Superconduct., vol. 5, pp. 3337-3340, June 1995.
-
(1995)
IEEE Trans. Appl. Superconduct.
, vol.5
, pp. 3337-3340
-
-
Herr, Q.P.1
Feldman, M.J.2
-
14
-
-
0004902466
-
-
available from Hypres, Inc., 175 Clearbrook Road, Elmsford, NY 10523
-
"Hypres niobium process flow and design rules," available from Hypres, Inc., 175 Clearbrook Road, Elmsford, NY 10523.
-
Hypres Niobium Process Flow and Design Rules
-
-
-
15
-
-
0031168005
-
Inductance estimation for complicated superconducting thin film structures with a finite segment method
-
June
-
B. Guan, M. J. Wengler, P. Rott, and M. J. Feldman, "Inductance estimation for complicated superconducting thin film structures with a finite segment method," IEEE Trans. Appl. Superconduct., vol. 7, pp. 2776-2779, June 1997.
-
(1997)
IEEE Trans. Appl. Superconduct.
, vol.7
, pp. 2776-2779
-
-
Guan, B.1
Wengler, M.J.2
Rott, P.3
Feldman, M.J.4
-
16
-
-
0031166944
-
PSCAN'96: New software for simulation and optimization of complex RSFQ circuits
-
June
-
S. Polonsky, P. Shevchenko, A. Kirichenko, D. Zinoviev, and A. Rylyakov, "PSCAN'96: New software for simulation and optimization of complex RSFQ circuits," IEEE Trans. Appl. Superconduct., vol. 7, pp. 2685-2689, June 1997.
-
(1997)
IEEE Trans. Appl. Superconduct.
, vol.7
, pp. 2685-2689
-
-
Polonsky, S.1
Shevchenko, P.2
Kirichenko, A.3
Zinoviev, D.4
Rylyakov, A.5
-
17
-
-
0027556856
-
Logic simulation of RSFQ circuits
-
Mar.
-
A. Krasniewski, "Logic simulation of RSFQ circuits," IEEE Trans. Appl. Superconduct., vol. 3, pp. 33-38, Mar. 1993.
-
(1993)
IEEE Trans. Appl. Superconduct.
, vol.3
, pp. 33-38
-
-
Krasniewski, A.1
-
19
-
-
0005142885
-
-
McGraw-Hill
-
D. Perry, VHDL, McGraw-Hill, 1991.
-
(1991)
VHDL
-
-
Perry, D.1
-
20
-
-
33749943694
-
Analysis of timing requirements for basic RSFQ cells
-
Oct.
-
K. Gaj, E. G. Friedman, and M. J. Feldman, "Analysis of timing requirements for basic RSFQ cells," presented at the Appl. Superconduct. Conf. 1994, Oct. 1994. Available at http://www.ee.rochester.edu/sde/research/publications/asc94.
-
(1994)
Appl. Superconduct. Conf. 1994
-
-
Gaj, K.1
Friedman, E.G.2
Feldman, M.J.3
-
21
-
-
0031170515
-
Timing of multi-gigahertz rapid single flux quantum digital circuits
-
_, "Timing of multi-gigahertz rapid single flux quantum digital circuits," J. VLSI Signal Processing, vol. 9, pp. 247-276, 1997.
-
(1997)
J. VLSI Signal Processing
, vol.9
, pp. 247-276
-
-
-
22
-
-
0002716308
-
Implementation of oversampling analog-to-digital converter based on RSFQ logic
-
V. K. Semenov, Y. A. Polyakov, and D. Schneider, "Implementation of oversampling analog-to-digital converter based on RSFQ logic," Ext. Abs. ISEC'97, pp. 41-43.
-
Ext. Abs. ISEC'97
, pp. 41-43
-
-
Semenov, V.K.1
Polyakov, Y.A.2
Schneider, D.3
-
23
-
-
2342464887
-
Parameter variations and synchronization of RSFQ circuits
-
Bristol, U.K., Series #148
-
K. Gaj, Q. P. Herr, and M. J. Feldman, "Parameter variations and synchronization of RSFQ circuits," in Proc. Applied Superconductivity, Institute of Physics Conf. Bristol, U.K., 1995, Series #148, pp. 1733-1736.
-
(1995)
Proc. Applied Superconductivity, Institute of Physics Conf.
, pp. 1733-1736
-
-
Gaj, K.1
Herr, Q.P.2
Feldman, M.J.3
-
24
-
-
33749727785
-
-
Presentation "Timing of Large RSFQ Circuits." Available at http://www.ee.rochester.edu/users/sde/research/projects/rsfq/timing/title. html.
-
Timing of Large RSFQ Circuits
-
-
-
25
-
-
0029321850
-
A clock distribution scheme for large RSFQ circuits
-
K. Gaj, E. G. Friedman, M. J. Feldman, and A. Krasniewski, "A clock distribution scheme for large RSFQ circuits," IEEE Trans. Appl. Superconduct., vol. 5, pp. 3320-3324, 1995.
-
(1995)
IEEE Trans. Appl. Superconduct.
, vol.5
, pp. 3320-3324
-
-
Gaj, K.1
Friedman, E.G.2
Feldman, M.J.3
Krasniewski, A.4
-
27
-
-
0031164978
-
Design and low speed testing of a four-bit RSFQ multiplier-accumulator
-
June
-
Q. P. Herr et al., "Design and low speed testing of a four-bit RSFQ multiplier-accumulator," IEEE Trans. Appl. Superconduct., vol. 7, pp. 3168-3171, June 1997.
-
(1997)
IEEE Trans. Appl. Superconduct.
, vol.7
, pp. 3168-3171
-
-
Herr, Q.P.1
-
28
-
-
0029326158
-
Adder-accumulator cells in RSFQ logic
-
S. S. Martinet, D. K. Brock, M. J. Feldman, and M. F. Bocko, "Adder-accumulator cells in RSFQ logic," IEEE Trans. Appl. Superconduct., vol. 5, pp. 3006-3009, 1995.
-
(1995)
IEEE Trans. Appl. Superconduct.
, vol.5
, pp. 3006-3009
-
-
Martinet, S.S.1
Brock, D.K.2
Feldman, M.J.3
Bocko, M.F.4
-
29
-
-
0032163811
-
High-speed operation of a 64-bit circular shift register
-
Sept.
-
A. M. Herr, C. A. Mancini, N. Vukovic, M. F. Bocko, and M. J. Feldman, "High-speed operation of a 64-bit circular shift register," IEEE Trans. Appl. Superconduct., vol. 8, pp. 120-124, Sept. 1998.
-
(1998)
IEEE Trans. Appl. Superconduct.
, vol.8
, pp. 120-124
-
-
Herr, A.M.1
Mancini, C.A.2
Vukovic, N.3
Bocko, M.F.4
Feldman, M.J.5
|