Seventh-generation x86 microprocessor

IEEE Journal of Solid-State Circuits

Volumn 34, Issue 11, 1999, Pages 1466-1477

  Golden, Michael ^a   Hesley, Steve ^a   Scherer, Alisa ^a   Crowley, Matthew ^a,b,c,d   Johnson, Scott C ^a   Meier, Stephan ^a   Meyer, Dirk ^a   Moench, Jerry D ^a   Oberman, Stuart ^a   Partovi, Hamid ^a   Weber, Fred ^a   White, Scott ^a   Wood, Tim ^a   Yong, John ^a  

^a ADVANCED MICRO DEVICES   (United States)

^b Rhombus Inc   (United States)

^c Amdahl Corporation   (United States)

^d NexGen   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER DEBUGGING; DATA ACQUISITION; DECODING; DESIGN FOR TESTABILITY; DIGITAL ARITHMETIC; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; PIPELINE PROCESSING SYSTEMS; TIMING CIRCUITS;

CELL-BASED DESIGN; REGISTER FILES;

MICROPROCESSOR CHIPS;

EID: 0033222011     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.799851     Document Type: Article

References (5)

1. S. Oberman et al., "AMD 3DNow! Technology and the K6-2 microprocessor," in Proc. Hot Chips 10, Aug. 1998, pp. 245-254.
2. H. Partovi et al., "Flow-through latch and edge-triggered flip-flop hybrid elements," in ISSCC Dig. Tech. Papers, Feb. 1996, pp. 138-139.
3. M. Golden and H. Partovi, "A 500 MHz, write-bypassed, 88-entry, 90-bit register file," in Proc. Symp. VLSI Circuits, June 1999, pp. 105-108.
4. B. Gieseke et al., "A 600 MHz superscalar RISC microprocessor with out-of-order execution," in ISSCC Dig. Tech. Papers, Feb. 1997, pp. 176-177.
5. S. Oberman, "Floating point division and square root algorithms and implementation in the AMD-K7 microprocessor," in Proc. 14th IEEE Symp. Computer Arithmetic, Apr. 1999, pp. 106-115.