Effectively exploiting indirect jumps

Software - Practice and Experience

Volumn 29, Issue 12, 1999, Pages 1061-1101

  Uh, Gang Ryung ^a   Whalley, David B ^b  

^a NOKIA RESEARCH CENTER   (United States)

^b NONE

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; CODES (SYMBOLS); DATA FLOW ANALYSIS;

BRANCH PREDICTION; BRANCH TARGET BUFFERS; INDIRECT JUMPS;

COMPUTER SYSTEMS PROGRAMMING;

EID: 0033206766     PISSN: 00380644     EISSN: None     Source Type: Journal    
DOI: 10.1002/(SICI)1097-024X(199910)29:12<1061::AID-SPE272>3.0.CO;2-K     Document Type: Article

References (25)

1. A. Sale, 'The implementation of case statements in Pascal', Software - Practice and Experience, 11, 929-942 (1981).
2. D. A. Spuler, 'Compiler code generation for multiway branch statements as a static search problem', Technical Report, Department of Computer Science, James Cook University, Townsville, Australia, 1994.
3. R. M. Clapp, L. Duchesneau, R. A. Volz, T. N. Mudge and T. Schultze, 'Toward real-time performance benchmarks for ADA', Communications of the ACM, 29(8), 760-778 (1986).
4. N. Altman and N. Weiderman, 'Timing variation in dual-loop benchmarks', Technical report, Software Engineering Institute, Carnegie Mellon University, Pittsburgh, PA, 1987.
5. M. E. Benitez and J. W. Davidson, 'A portable global optimizer and linker', ACM SIGPLAN Conference on Programming Language Design and Implementation, 1988, pp. 329-338.
6. J. W. Davidson and D. B. Whalley, 'Quick compilers using peephole optimizations', Software - Practice and Experience, 19(1), 195-203 (1989).
7. J. W. Davidson and S. Jinturkar, 'Aggressive loop unrolling in a retargetable, optimizing compiler', Proceedings of Compiler Construction Conference, 1996, pp. 59-73.
8. F. Allen and J. Cocke, Design and Optimization of Compilers, Prentice-Hall, Englewood Cliffs, NJ, 1971.
9. F. Mueller and D. B. Whalley, 'Avoiding conditional branches by code replication', ACM SIGPLAN Conference on Programming Language Design and Implementation, 1995, pp. 56-66.
10. R. Bodik, R. Gupta and M. L. Soffa, 'Interprocedural conditional branch elimination', AGM SIGPLAN Conference on Programming Language Design and Implementation, 1997.
11. M. Yang, G.-R. Uh and D. B. Whalley, 'Improving performance by branch reordering', AGM SIGPLAN Conference on Programming Language Design and Implementation, 1998.
12. S. C. Johnson, A Tour Through the Portable C Compiler, Unix Programmer's Manual 7th Edition Section 33, 1979.
13. R. M. Stallman, Using and Porting GNU CC (version 1.37.1), Free Software Foundation, Inc., Cambridge, MA, 1990.
14. D. W. Wall, 'Limits of instruction-level parallelism', Architectural Support for Programming Languages and Operating Systems, 1991, pp. 176-188.
15. C. H. Perleberg and A. J. Smith, 'Branch target buffer design and optimization', IEEE Transactions on Computers, 42(4), 396-412 (1993).
16. P.-Y. Chang, E. Hao and Y. N. Patt, 'Target prediction for indirect jumps', The 24th Annual International Symposium on Computer Architecture.
17. J. Hennessy and D. Patterson, Computer Architecture: A quantitative Approach (Second ed.), Morgan Kaufmann, San Francisco, CA, 1996.
18. A. M. Holler, 'Optimization for a superscalar out-of-order machine', Proceedings of the 29th International Symposium on Micorarchitecture, 1996, pp. 336-348.
19. B. Calder and D. Grunwald, 'Reducing indirect function call overhead in C++ programs', Proceedings of the ACM Symposium on Principles and Practice of Programming Language, 1994, pp. 397-408.
20. S. Pan, K. So and J. T. Rahmeh, 'Improving the accuracy of dynamic branch prediction using branch correlation', Architectural Support for Programming Languages and Operating Systems, 1992, pp. 76-84.
21. M. D. Smith, M. S. Lam and M. A. Horowitz, 'Boosting beyond static scheduling in a superscalar processor', Proceedings of the 17th International Symposium on Computer Architecture, 1990, pp. 344-353.
22. D. N. Pnevmatikatos and G. S. Sohi, 'Guarded execution and branch prediction in dynamic ILP processors', Proceedings of the 21st International Symposium on Computer Architecture, 1994, pp. 120-129.
23. S. A. Mahlke, R. E. Hank, R. A. Bringmann, J. C. Gyllenhaal, D. M. Gallagher and W. W. Hwu, 'Characterizing the impact of predicated execution on branch prediction', Proceedings of the 27th International Symposium on Microarchitecture, 1994, pp. 217-227.
24. A. J. Smith, 'Cache memories', Computing Surveys, 14(3), 473-530 (1982).
25. J. W. Davidson and D. B. Whalley, 'A design environment for addressing architecture and compiler interactions', Microprocessors and Microsystems, 15(9), 459-472 (1991).