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Volumn 30, Issue 6, 1995, Pages 56-66

Avoiding Conditional Branches by Code Replication

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Indexed keywords


EID: 84976730172     PISSN: 03621340     EISSN: 15581160     Source Type: Journal    
DOI: 10.1145/223428.207116     Document Type: Article
Times cited : (47)

References (15)
  • 1
    • 0003612724 scopus 로고
    • Loop Transformations for Restructuring Compilers: The Foundations
    • [Ban93], Kluwer Academic Publishers, Norwell, MA
    • [Ban93] U. Banerjee, Loop Transformations for Restructuring Compilers: The Foundations, Kluwer Academic Publishers, Norwell, MA (1993).
    • (1993)
    • Banerjee, U.1
  • 3
    • 0024065560 scopus 로고
    • A Study of a C Function Inliner
    • August
    • [DaH88] J. Davidson and A. Holler, “A Study of a C Function Inliner Software—Practice & Experience 18(8) pp. 775–790 (August 1988).
    • (1988) Software—Practice & Experience , vol.18 , Issue.8 , pp. 775-790
    • Davidson, J.1    Holler, A.2
  • 4
    • 0026819854 scopus 로고
    • Subprogram Inlining: A Study of its Effects on Program Execution Time
    • [DaH92] J. W. Davidson and A. M. Holler, February
    • [DaH92] J. W. Davidson and A. M. Holler, “Subprogram Inlining: A Study of its Effects on Program Execution Time” IEEE Transactions on Software Engineering 18(2) pp. 89–102 (February 1992).
    • (1992) IEEE Transactions on Software Engineering , vol.18 , Issue.2 , pp. 89-102
  • 5
    • 0026256102 scopus 로고
    • A Design Environment for Addressing Architecture and Compiler Interactions
    • [DaW91] J. W. Davidson and D. B. Whalley, November
    • [DaW91] J. W. Davidson and D. B. Whalley, “A Design Environment for Addressing Architecture and Compiler Interactions”, Microprocessors and Microsystems 15(9) pp. 459–472 (November 1991).
    • (1991) Microprocessors and Microsystems , vol.15 , Issue.9 , pp. 459-472
  • 6
    • 0025239232 scopus 로고
    • Instruction Scheduling beyond Basic Blocks
    • [GoR90] M. C. Golumbic and V. Rainish, January
    • [GoR90] M. C. Golumbic and V. Rainish, “Instruction Scheduling beyond Basic Blocks,” IBM Journal of Research and Development 34(1) pp. 93–97 (January 1990).
    • (1990) IBM Journal of Research and Development , vol.34 , Issue.1 , pp. 93-97
  • 8
    • 84976701854 scopus 로고
    • Patterson
    • [HeP90] J. Hennessy and D. Morgan Kaufmann, San Mateo, CA
    • [HeP90] J. Hennessy and D. Patterson, Computer Architecture: A Quantitative Approach, Morgan Kaufmann, San Mateo, CA (1990).
    • (1990) Computer Architecture: A Quantitative Approach
  • 11
    • 33746032373 scopus 로고
    • Compiler Design Theory
    • [LRS76] P. M. Lewis, D. J. Rosenkrantz, and R. E. Stearns, Reading, MA
    • [LRS76] P. M. Lewis, D. J. Rosenkrantz, and R. E. Stearns, Compiler Design Theory; Addison-Wesley, Reading, MA (1976).
    • (1976) Addison-Wesley
  • 12
    • 0018434045 scopus 로고
    • Global Optimizations by Suppression of Partial Redundancies
    • February
    • [MoR79] E. Morel and C. Renvoise, “Global Optimizations by Suppression of Partial Redundancies,” Communications of the ACM 22(2) pp. 96–103 (February 1979).
    • (1979) Communications of the ACM 22(2) , pp. 96-103
    • Morel, E.1    Renvoise, C.2
  • 14
    • 0020177251 scopus 로고
    • Cache Memories
    • September
    • [Smi82] A. J. Smith, “Cache Memories,” Computing Surveys 14(3) pp. 473–530 (September 1982).
    • (1982) Computing Surveys , vol.14 , Issue.3 , pp. 473-530
    • Smith, A.J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.