-
1
-
-
33747232421
-
The Generalized Distributive Law
-
submitted for publication, July
-
S.M. Aji and R.J. McEliece, "The Generalized Distributive Law," IEEE Trans. Information Theory, submitted for publication, July 1998.
-
(1998)
IEEE Trans. Information Theory
-
-
Aji, S.M.1
McEliece, R.J.2
-
2
-
-
0017983865
-
Binary Decision Diagrams
-
Aug.
-
S.B. Akers, "Binary Decision Diagrams," IEEE Trans. Computers, vol. 27, no. 8, pp. 509-516, Aug. 1978.
-
(1978)
IEEE Trans. Computers
, vol.27
, Issue.8
, pp. 509-516
-
-
Akers, S.B.1
-
3
-
-
0029475529
-
Formal Verification of a PowerPC Microprocessor
-
San Jose, Calif., Nov.
-
D.P. Appenzeller and A. Kuehlmann, "Formal Verification of a PowerPC Microprocessor," Proc. Int'l Conf. Computer-Aided Design (ICCAD), pp. 79-84, San Jose, Calif., Nov. 1995.
-
(1995)
Proc. Int'l Conf. Computer-Aided Design (ICCAD)
, pp. 79-84
-
-
Appenzeller, D.P.1
Kuehlmann, A.2
-
4
-
-
0027880685
-
Algebraic Decision Diagrams and Their Application
-
Santa Clara, Calif., Nov.
-
R.I. Bahar, E.A. Frohm, C.M. Gaona, G.D. Hachtel, E. Macii, A. Prado, and F. Somenzi, "Algebraic Decision Diagrams and Their Application," Proc. Int'l Conf. Computer-Aided Design (ICCAD), pp. 188-191, Santa Clara, Calif., Nov. 1993.
-
(1993)
Proc. Int'l Conf. Computer-Aided Design (ICCAD)
, pp. 188-191
-
-
Bahar, R.I.1
Frohm, E.A.2
Gaona, C.M.3
Hachtel, G.D.4
Macii, E.5
Prado, A.6
Somenzi, F.7
-
5
-
-
0016037512
-
Optimal Decoding of Linear Codes for Minimizing Symbol Error Rate
-
Mar.
-
L.R. Bahl, J. Cocke, F. Jelinek, and J. Raviv, "Optimal Decoding of Linear Codes for Minimizing Symbol Error Rate," IEEE Trans. Information Theory, vol. 20, pp. 284-287, Mar. 1974.
-
(1974)
IEEE Trans. Information Theory
, vol.20
, pp. 284-287
-
-
Bahl, L.R.1
Cocke, J.2
Jelinek, F.3
Raviv, J.4
-
6
-
-
0020719320
-
A Maximum Likelihood Approach to Continuous Speech Recognition
-
Mar.
-
L.R. Bahl, F. Jelinek, and R.L. Mercer, "A Maximum Likelihood Approach to Continuous Speech Recognition," IEEE Trans. Pattern Analysis and Machine Intelligence, vol. 5, pp. 179-190, Mar. 1983.
-
(1983)
IEEE Trans. Pattern Analysis and Machine Intelligence
, vol.5
, pp. 179-190
-
-
Bahl, L.R.1
Jelinek, F.2
Mercer, R.L.3
-
8
-
-
0027297425
-
Near Shannon Limit Error-Eorrecting Coding and Decoding: Turbo Codes
-
Geneva, July
-
C. Berrou, A. Glavieux, and P. Thitimajshima, "Near Shannon Limit Error-Eorrecting Coding and Decoding: Turbo Codes," Proc. IEEE Int'l Conf. Comm., pp. 1,064-1,070, Geneva, July 1993.
-
(1993)
Proc. IEEE Int'l Conf. Comm.
-
-
Berrou, C.1
Glavieux, A.2
Thitimajshima, P.3
-
9
-
-
0026973231
-
Delay Fault Test Generation for Scan/Hold Circuits Using Boolean Expressions
-
Anaheim, Calif., June
-
D. Bhattacharya, P. Agrawal, and V.D. Agrawal, "Delay Fault Test Generation for Scan/Hold Circuits Using Boolean Expressions," Proc. Design Automation Conf. (DAC), pp. 159-164, Anaheim, Calif., June 1992.
-
(1992)
Proc. Design Automation Conf. (DAC)
, pp. 159-164
-
-
Bhattacharya, D.1
Agrawal, P.2
Agrawal, V.D.3
-
10
-
-
33747270648
-
Complexity Theoretical Aspects of OFDDs
-
T. Sasao and M. Fujita, eds. Boston: Kluwer Academic
-
B. Bollig, M. Löbbing, M. Sauerhoff, and I. Wegener, "Complexity Theoretical Aspects of OFDDs," Representations of Discrete Functions, T. Sasao and M. Fujita, eds. Boston: Kluwer Academic, 1996.
-
(1996)
Representations of Discrete Functions
-
-
Bollig, B.1
Löbbing, M.2
Sauerhoff, M.3
Wegener, I.4
-
11
-
-
0030246260
-
Improving the Variable Ordering of OBDDs Is NP-Complete
-
Sept.
-
B. Bollig and I. Wegener, "Improving the Variable Ordering of OBDDs Is NP-Complete," IEEE Trans. Computers, vol. 45, no. 9, pp. 993-1,002, Sept. 1996.
-
(1996)
IEEE Trans. Computers
, vol.45
, Issue.9
-
-
Bollig, B.1
Wegener, I.2
-
12
-
-
0025558645
-
Efficient Implementation of a BDD Package
-
Orlando, Fla., June
-
K.S. Brace, R.L. Rudell, and R.E. Bryant, "Efficient Implementation of a BDD Package," Proc. Design Automation Conf. (DAC), pp. 40-45, Orlando, Fla., June 1990.
-
(1990)
Proc. Design Automation Conf. (DAC)
, pp. 40-45
-
-
Brace, K.S.1
Rudell, R.L.2
Bryant, R.E.3
-
14
-
-
0022769976
-
Graph-Based Algorithms for Boolean Function Manipulations
-
Aug.
-
R.E. Bryant, "Graph-Based Algorithms for Boolean Function Manipulations," IEEE Trans. Computers, vol. 35, no. 8, pp. 677-691, Aug. 1986.
-
(1986)
IEEE Trans. Computers
, vol.35
, Issue.8
, pp. 677-691
-
-
Bryant, R.E.1
-
15
-
-
0026107125
-
On the Complexity of VLSI Implementations and Graph Representations of Boolean Functions with Application to Integer Multiplication
-
Feb.
-
R.E. Bryant, "On the Complexity of VLSI Implementations and Graph Representations of Boolean Functions with Application to Integer Multiplication," IEEE Trans. Computers, vol. 40, no. 2, pp. 205-213, Feb. 1991.
-
(1991)
IEEE Trans. Computers
, vol.40
, Issue.2
, pp. 205-213
-
-
Bryant, R.E.1
-
16
-
-
0026913667
-
Symbolic Boolean Manipulation with Ordered Binary Decision Diagrams
-
Sept.
-
R.E. Bryant, "Symbolic Boolean Manipulation with Ordered Binary Decision Diagrams," ACM Computing Surveys, vol. 24, pp. 293-318, Sept. 1992.
-
(1992)
ACM Computing Surveys
, vol.24
, pp. 293-318
-
-
Bryant, R.E.1
-
17
-
-
85037462472
-
Division, Pentium Style: An Analysis of Intel's Mistake(s)
-
22 Feb.
-
R.E. Bryant, "Division, Pentium Style: An Analysis of Intel's Mistake(s)," CMU Computer Systems Seminar, 22 Feb. 1995
-
(1995)
CMU Computer Systems Seminar
-
-
Bryant, R.E.1
-
18
-
-
0029508892
-
Binary Decision Diagrams and Beyond: Enabling Technologies for Formal Verification
-
San Jose, Calif., Nov.
-
R.E. Bryant, "Binary Decision Diagrams and Beyond: Enabling Technologies for Formal Verification," Proc. Int'l Conf. Computer-Aided Design (ICCAD), pp. 236-243, San Jose, Calif., Nov. 1995.
-
(1995)
Proc. Int'l Conf. Computer-Aided Design (ICCAD)
, pp. 236-243
-
-
Bryant, R.E.1
-
19
-
-
33747210266
-
-
personal communication, Nov.
-
R.E. Bryant, personal communication, Nov. 1997.
-
(1997)
-
-
Bryant, R.E.1
-
20
-
-
0029224152
-
Verification of Arithmetic Functions with Binary Moment Diagrams
-
San Francisco, June
-
R.E. Bryant and Y.-A. Chen, "Verification of Arithmetic Functions with Binary Moment Diagrams," Proc. Design Automation Conf. (DAC), pp. 535-541, San Francisco, June 1995.
-
(1995)
Proc. Design Automation Conf. (DAC)
, pp. 535-541
-
-
Bryant, R.E.1
Chen, Y.-A.2
-
21
-
-
0025566514
-
Sequential Circuit Verification Using Symbolic Model Checking
-
Orlando, Fla., June
-
J.R. Burch, E.M. Clarke, D.L. Dill, and K. McMillan, "Sequential Circuit Verification Using Symbolic Model Checking," Proc. Design Automation Conf. (DAC), pp. 46-51, Orlando, Fla., June 1990.
-
(1990)
Proc. Design Automation Conf. (DAC)
, pp. 46-51
-
-
Burch, J.R.1
Clarke, E.M.2
Dill, D.L.3
McMillan, K.4
-
22
-
-
0032675409
-
Minimal Tail-Biting Trellises: The Golay Code and More
-
to appear, July
-
A.R. Calderbank, G.D. Forney Jr., and A. Vardy, "Minimal Tail-Biting Trellises: The Golay Code and More," IEEE Trans. Information Theory, to appear, July 1999.
-
(1999)
IEEE Trans. Information Theory
-
-
Calderbank, A.R.1
Forney Jr., G.D.2
Vardy, A.3
-
23
-
-
0037565605
-
Multi-Terminal Binary Decision Diagrams: An Efficient Data Structure for Matrix Representation
-
Louvain, Belgium, July
-
E. Clarke, M. Fujita, P. McGeer, K. McMillan, J. Yang, and X. Zhao, "Multi-Terminal Binary Decision Diagrams: An Efficient Data Structure for Matrix Representation," Proc. Int'l Workshop Logic Synthesis, pp. P6a:1-15, Louvain, Belgium, July 1993.
-
(1993)
Proc. Int'l Workshop Logic Synthesis
-
-
Clarke, E.1
Fujita, M.2
McGeer, P.3
McMillan, K.4
Yang, J.5
Zhao, X.6
-
24
-
-
0029516535
-
Hybrid Decision Diagrams - Overcoming the Limitations of MTBDDs and BMDs
-
San Jose, Calif., Nov.
-
E.M. Clarke, M. Fujita, and X. Zhao, "Hybrid Decision Diagrams - Overcoming the Limitations of MTBDDs and BMDs," Proc. Int'l Conf. Computer-Aided Design (ICCAD), pp. 159-163, San Jose, Calif., Nov. 1995.
-
(1995)
Proc. Int'l Conf. Computer-Aided Design (ICCAD)
, pp. 159-163
-
-
Clarke, E.M.1
Fujita, M.2
Zhao, X.3
-
25
-
-
0022563696
-
Soft Decoding Techniques for Codes and Lattices, Including the Golay Code and the Leech Lattice
-
Jan.
-
J.H. Conway and N.J.A. Sloane, "Soft Decoding Techniques for Codes and Lattices, Including the Golay Code and the Leech Lattice," IEEE Trans. Information Theory, vol. 32, pp. 41-50, Jan. 1986.
-
(1986)
IEEE Trans. Information Theory
, vol.32
, pp. 41-50
-
-
Conway, J.H.1
Sloane, N.J.A.2
-
26
-
-
84856140605
-
Verification of Sequential Machines Based on Symbolic Execution
-
O. Coudert, C. Berthet, and J.C. Madre, "Verification of Sequential Machines Based on Symbolic Execution," Automatic Verification Methods for Finite State Systems, pp. 365-373, 1989.
-
(1989)
Automatic Verification Methods for Finite State Systems
, pp. 365-373
-
-
Coudert, O.1
Berthet, C.2
Madre, J.C.3
-
27
-
-
0029734405
-
K*BMDs: A New Data Structure for Verification
-
Paris, Mar.
-
R. Drechsler, B. Becker, and S. Ruppertz, "K*BMDs: A New Data Structure for Verification," Proc. European Design and Test Conf., Paris, Mar. 1996.
-
(1996)
Proc. European Design and Test Conf.
-
-
Drechsler, R.1
Becker, B.2
Ruppertz, S.3
-
28
-
-
0028594117
-
Efficient Representation and Manipulation of Switching Functions Based on Ordered Kronecker Functional Decision Diagrams
-
San Diego, Calif., June
-
R. Drechsler, A. Sarabi, M. Theobald, B. Becker, and M.A. Perkowski, "Efficient Representation and Manipulation of Switching Functions Based on Ordered Kronecker Functional Decision Diagrams," Proc. Design Automation Conf. (DAC), pp. 415-419, San Diego, Calif., June 1994.
-
(1994)
Proc. Design Automation Conf. (DAC)
, pp. 415-419
-
-
Drechsler, R.1
Sarabi, A.2
Theobald, M.3
Becker, B.4
Perkowski, M.A.5
-
29
-
-
85037448698
-
-
J.D. Ferguson, ed., Inst, for Defense Analyses, Princeton, N.J.
-
Proc. Symp. Application of Hidden Markov Models to Text and Speech, J.D. Ferguson, ed., Inst, for Defense Analyses, Princeton, N.J., 1980.
-
(1980)
Proc. Symp. Application of Hidden Markov Models to Text and Speech
-
-
-
31
-
-
0015346024
-
Maximum-Likelihood Sequence Estimation of Digital Sequences in the Presence of Intersymbol Interference
-
May
-
G.D. Forney Jr., "Maximum-Likelihood Sequence Estimation of Digital Sequences in the Presence of Intersymbol Interference," IEEE Trans. Information Theory, vol. 18, pp. 363-378, May 1972.
-
(1972)
IEEE Trans. Information Theory
, vol.18
, pp. 363-378
-
-
Forney Jr., G.D.1
-
32
-
-
0015600423
-
The Viterbi Algorithm
-
G.D. Forney Jr., "The Viterbi Algorithm," Proc. IEEE, vol. 61, pp. 268-278, 1973.
-
(1973)
Proc. IEEE
, vol.61
, pp. 268-278
-
-
Forney Jr., G.D.1
-
33
-
-
0028547151
-
Dimension/Length Profiles and Trellis Complexity of Linear Block Codes
-
Nov.
-
G.D. Forney Jr., "Dimension/Length Profiles and Trellis Complexity of Linear Block Codes," IEEE Trans. Information Theory, vol. 40, pp. 1,741-1,752, Nov. 1994.
-
(1994)
IEEE Trans. Information Theory
, vol.40
-
-
Forney Jr., G.D.1
-
34
-
-
84941860379
-
Coset Codes II: Binary Lattices and Related Codes
-
Sept.
-
G.D. Forney Jr., "Coset Codes II: Binary Lattices and Related Codes," IEEE Trans. Information Theory, vol. 34, pp. 1,152-1,187, Sept. 1988.
-
(1988)
IEEE Trans. Information Theory
, vol.34
-
-
Forney Jr., G.D.1
-
35
-
-
0000364847
-
Multilingual Dictionary: System Theory, Coding Theory, Symbolic Dynamics and Automata Theory
-
A.R. Calderbank, ed., Providence, R.I.: AMS Press
-
G.D. Forney Jr., B.H. Marcus, N.T. Sindhushayana, and M.D. Trott, "Multilingual Dictionary: System Theory, Coding Theory, Symbolic Dynamics and Automata Theory," Different Aspects of Coding Theory, A.R. Calderbank, ed., vol. 50, pp. 109-138. Providence, R.I.: AMS Press, 1995.
-
(1995)
Different Aspects of Coding Theory
, vol.50
, pp. 109-138
-
-
Forney Jr., G.D.1
Marcus, B.H.2
Sindhushayana, N.T.3
Trott, M.D.4
-
36
-
-
0027668052
-
The Dynamics of Group Codes: State Spaces, Trellises and Canonical Encoders
-
Sept.
-
G.D. Forney Jr. and M.D. Trott, "The Dynamics of Group Codes: State Spaces, Trellises and Canonical Encoders," IEEE Trans. Information Theory, vol. 39, pp. 1,491-1,513, Sept. 1993.
-
(1993)
IEEE Trans. Information Theory
, vol.39
-
-
Forney Jr., G.D.1
Trott, M.D.2
-
39
-
-
0029768237
-
MORE: Alternative Implementation of BDD-Packages by Multi-Operand Synthesis
-
Paris, Mar.
-
A. Hett, R. Drechsler, and B. Becker, "MORE: Alternative Implementation of BDD-Packages by Multi-Operand Synthesis," Proc. European Design and Test Conf., Paris, Mar. 1996.
-
(1996)
Proc. European Design and Test Conf.
-
-
Hett, A.1
Drechsler, R.2
Becker, B.3
-
40
-
-
0030836253
-
Two-Step Trellis Decoding of Partial Unit Memory Convolutional Codes
-
Jan.
-
M.F. Hole and O. Ytrehus, "Two-Step Trellis Decoding of Partial Unit Memory Convolutional Codes," IEEE Trans. Information Theory, vol. 43, pp. 324-325, Jan. 1997.
-
(1997)
IEEE Trans. Information Theory
, vol.43
, pp. 324-325
-
-
Hole, M.F.1
Ytrehus, O.2
-
41
-
-
0003620778
-
-
Reading, Mass.: Addison-Wesley
-
J.E. Hopcroft and J.D. Ullman, Introduction to Automata Theory, Languages, and Computation. Reading, Mass.: Addison-Wesley, 1979.
-
(1979)
Introduction to Automata Theory, Languages, and Computation
-
-
Hopcroft, J.E.1
Ullman, J.D.2
-
42
-
-
0030286941
-
On the Intractability of Permuting a Block Code to Minimize Trellis Complexity
-
Nov.
-
G. Horn and F.R. Kschischang, "On the Intractability of Permuting a Block Code to Minimize Trellis Complexity," IEEE Trans. Information Theory, vol. 42, pp. 2,042-2,048, Nov. 1996.
-
(1996)
IEEE Trans. Information Theory
, vol.42
-
-
Horn, G.1
Kschischang, F.R.2
-
43
-
-
11144343315
-
A New Multilevel Coding Method Using Error-Correcting Codes
-
H. Imai and S. Hirakawa, "A New Multilevel Coding Method Using Error-Correcting Codes," IEEE Trans. Information Theory, vol. 23, pp. 371-377, 1977.
-
(1977)
IEEE Trans. Information Theory
, vol.23
, pp. 371-377
-
-
Imai, H.1
Hirakawa, S.2
-
44
-
-
0032075310
-
The 'Art of Trellis Decoding' Is Computationally Hard - For Large Fields
-
May
-
K. Jain, I. Mandoiu, and V.V. Vazirani, "The 'Art of Trellis Decoding' Is Computationally Hard - For Large Fields," IEEE Trans. Information Theory, vol. 44, pp. 1,211-1,214, May 1998.
-
(1998)
IEEE Trans. Information Theory
, vol.44
-
-
Jain, K.1
Mandoiu, I.2
Vazirani, V.V.3
-
45
-
-
0027257044
-
On the Optimum Bit Orders with Respect to the State Complexity of Trellis Diagrams for Binary Linear Block Codes
-
Jan.
-
T. Kasami, T. Takata, T. Fujiwara, and S. Lin, "On the Optimum Bit Orders with Respect to the State Complexity of Trellis Diagrams for Binary Linear Block Codes," IEEE Trans. Information Theory, vol. 39, pp. 242-245, Jan. 1993.
-
(1993)
IEEE Trans. Information Theory
, vol.39
, pp. 242-245
-
-
Kasami, T.1
Takata, T.2
Fujiwara, T.3
Lin, S.4
-
46
-
-
0002612059
-
Multilevel Logic Based on Functional Decision Diagrams
-
Paris, Mar.
-
U. Kebschull, E. Schubert, and W. Rosentiel, "Multilevel Logic Based on Functional Decision Diagrams," Proc. European Design and Test Conf., pp. 43-47, Paris, Mar. 1992.
-
(1992)
Proc. European Design and Test Conf.
, pp. 43-47
-
-
Kebschull, U.1
Schubert, E.2
Rosentiel, W.3
-
47
-
-
0030286487
-
Trellis Decoding Complexity of Linear Block Codes
-
Nov.
-
A.B. Kiely, S. Dolinar, R.J. McEliece, L. Ekroot, and W. Lin, "Trellis Decoding Complexity of Linear Block Codes," IEEE Trans. Information Theory, vol. 42, pp. 1,687-1,697, Nov. 1996.
-
(1996)
IEEE Trans. Information Theory
, vol.42
-
-
Kiely, A.B.1
Dolinar, S.2
McEliece, R.J.3
Ekroot, L.4
Lin, W.5
-
48
-
-
84938834590
-
Construction of Minimal Tail-Biting Trellises
-
Killarney, Ireland, June
-
R. Kötter and A. Vardy, "Construction of Minimal Tail-Biting Trellises," Proc. IEEE Int'l Workshop Information Theory, pp. 73-75, Killarney, Ireland, June 1998.
-
(1998)
Proc. IEEE Int'l Workshop Information Theory
, pp. 73-75
-
-
Kötter, R.1
Vardy, A.2
-
51
-
-
0030284121
-
The Trellis Structure of Maximal Fixed-Cost Codes
-
Nov.
-
F.R. Kschischang, "The Trellis Structure of Maximal Fixed-Cost Codes," IEEE Trans. Information Theory, vol. 42, pp. 1,828-1,838, Nov. 1996.
-
(1996)
IEEE Trans. Information Theory
, vol.42
-
-
Kschischang, F.R.1
-
52
-
-
0003242352
-
Factor Graphs and the Sum-Product Algorithm
-
submitted for publication, July
-
F.R. Kschischang, B.J. Frey, and H.-A. Loeliger, "Factor Graphs and the Sum-Product Algorithm," IEEE Trans. Information Theory, submitted for publication, July 1998.
-
(1998)
IEEE Trans. Information Theory
-
-
Kschischang, F.R.1
Frey, B.J.2
Loeliger, H.-A.3
-
53
-
-
0029407106
-
On the Trellis Structure of Block Codes
-
Nov.
-
F.R. Kschischang and V. Sorokine, "On the Trellis Structure of Block Codes," IEEE Trans. Information Theory, vol. 41, pp. 1,924-1,937, Nov. 1995.
-
(1995)
IEEE Trans. Information Theory
, vol.41
-
-
Kschischang, F.R.1
Sorokine, V.2
-
54
-
-
0029276653
-
Asymptotically Good Codes Have Infinite Trellis Complexity
-
Mar.
-
A. Lafourcade and A. Vardy, "Asymptotically Good Codes Have Infinite Trellis Complexity," IEEE Trans. Information Theory, vol. 41, pp. 555-559, Mar. 1995.
-
(1995)
IEEE Trans. Information Theory
, vol.41
, pp. 555-559
-
-
Lafourcade, A.1
Vardy, A.2
-
55
-
-
0029409022
-
Lower Bounds on Trellis Complexity of Block Codes
-
Nov.
-
A. Lafourcade and A. Vardy, "Lower Bounds on Trellis Complexity of Block Codes," IEEE Trans. Information Theory, vol. 41, pp. 1,938-1,954, Nov. 1995.
-
(1995)
IEEE Trans. Information Theory
, vol.41
-
-
Lafourcade, A.1
Vardy, A.2
-
57
-
-
0026992526
-
Edge-Valued Binary Decision Diagrams for Multi-Level Hierarchical Verification
-
Anaheim, Calif., June
-
Y.-T. Lai and S. Sastry, "Edge-Valued Binary Decision Diagrams for Multi-Level Hierarchical Verification," Proc. Design Automation Conf. (DAC), pp. 608-613, Anaheim, Calif., June 1992.
-
(1992)
Proc. Design Automation Conf. (DAC)
, pp. 608-613
-
-
Lai, Y.-T.1
Sastry, S.2
-
58
-
-
84903828974
-
Representation of Switching Circuits by Binary Decision Programs
-
July
-
C. Lee, "Representation of Switching Circuits by Binary Decision Programs," Bell Systems Technical J., vol. 38, pp. 985-999, July 1959.
-
(1959)
Bell Systems Technical J.
, vol.38
, pp. 985-999
-
-
Lee, C.1
-
59
-
-
0026882239
-
On the OBDD-Representation of General Boolean Functions
-
July
-
H.T. Liaw and C.S. Lin, "On the OBDD-Representation of General Boolean Functions," IEEE Trans. Computers, vol. 41, no. 7, pp. 661-664, July 1992.
-
(1992)
IEEE Trans. Computers
, vol.41
, Issue.7
, pp. 661-664
-
-
Liaw, H.T.1
Lin, C.S.2
-
60
-
-
0033099611
-
Good Error-Correcting Codes Based on Very Sparse Matrices
-
Mar.
-
D.J.C. MacKay, "Good Error-Correcting Codes Based on Very Sparse Matrices," IEEE Trans. Information Theory, vol. 45, pp. 399-431, Mar. 1999.
-
(1999)
IEEE Trans. Information Theory
, vol.45
, pp. 399-431
-
-
MacKay, D.J.C.1
-
61
-
-
0002285674
-
A Logically Complete Reasoning Maintenance System Based on a Logical Constraint Solver
-
Sydney, Australia, Aug.
-
J.C. Madre and O. Coudert, "A Logically Complete Reasoning Maintenance System Based on a Logical Constraint Solver," Proc. Int'l Joint Conf. Artificial Intelligence, pp. 294-299, Sydney, Australia, Aug. 1991.
-
(1991)
Proc. Int'l Joint Conf. Artificial Intelligence
, pp. 294-299
-
-
Madre, J.C.1
Coudert, O.2
-
62
-
-
0001516693
-
Foundation and Methods of Channel Encoding
-
NTG-Fachberichte, Berlin
-
J.L. Massey, "Foundation and Methods of Channel Encoding," Proc. Int'l Conf. Information Theory and Systems, vol. 65, pp. 148-157, NTG-Fachberichte, Berlin, 1978.
-
(1978)
Proc. Int'l Conf. Information Theory and Systems
, vol.65
, pp. 148-157
-
-
Massey, J.L.1
-
63
-
-
0030195678
-
On the BCJR Trellis for Linear Block Codes
-
July
-
R.J. McEliece, "On the BCJR Trellis for Linear Block Codes," IEEE Trans. Information Theory, vol. 42, pp. 1,072-1,092, July 1996.
-
(1996)
IEEE Trans. Information Theory
, vol.42
-
-
McEliece, R.J.1
-
64
-
-
0024078703
-
Minimal Trellises for Block Codes
-
Sept.
-
D.J. Muder, "Minimal Trellises for Block Codes," IEEE Trans. Information Theory, vol. 34, pp. 1,049-1,053, Sept. 1988.
-
(1988)
IEEE Trans. Information Theory
, vol.34
-
-
Muder, D.J.1
-
65
-
-
0029708239
-
High Performance BDD Package Based on Exploiting Memory Hierarchy
-
Las Vegas, Nev., June
-
R.K. Ranjan, J.V. Sanghavi, R.K. Brayton, and A. Sangiovanni-Vincentelli, "High Performance BDD Package Based on Exploiting Memory Hierarchy," Proc. Design Automation Conf. (DAC), Las Vegas, Nev., June 1996.
-
(1996)
Proc. Design Automation Conf. (DAC)
-
-
Ranjan, R.K.1
Sanghavi, J.V.2
Brayton, R.K.3
Sangiovanni-Vincentelli, A.4
-
66
-
-
0032026258
-
Entropy/Length Profiles, Bounds on the Minimal Covering of Bipartite Graphs, and Trellis Complexity of Nonlinear Codes
-
Mar.
-
I. Reuven and Y. Be'ery, "Entropy/Length Profiles, Bounds on the Minimal Covering of Bipartite Graphs, and Trellis Complexity of Nonlinear Codes," IEEE Trans. Information Theory, vol. 44, pp. 580-598, Mar. 1998.
-
(1998)
IEEE Trans. Information Theory
, vol.44
, pp. 580-598
-
-
Reuven, I.1
Be'ery, Y.2
-
67
-
-
0027841555
-
Dynamic Variable Ordering for Ordered Binary Decision Diagrams
-
Nov.
-
R.L. Rudell, "Dynamic Variable Ordering for Ordered Binary Decision Diagrams," Proc. Int'l Conf. Computer-Aided Design (ICCAD), pp. 42-47, Nov. 1993.
-
(1993)
Proc. Int'l Conf. Computer-Aided Design (ICCAD)
, pp. 42-47
-
-
Rudell, R.L.1
-
68
-
-
0025557062
-
Boolean Resubstitution with Permissible Functions and Binary Decision Diagrams
-
Orlando, Fla., June
-
H. Sato, Y. Yasue, Y. Matsunaga, and M. Fujita, "Boolean Resubstitution with Permissible Functions and Binary Decision Diagrams," Proc. Design Automation Conf. (DAC), pp. 284-289, Orlando, Fla., June 1990.
-
(1990)
Proc. Design Automation Conf. (DAC)
, pp. 284-289
-
-
Sato, H.1
Yasue, Y.2
Matsunaga, Y.3
Fujita, M.4
-
69
-
-
84938487169
-
The Synthesis of Two-Terminal Switching Circuits
-
Jan.
-
C.E. Shannon, "The Synthesis of Two-Terminal Switching Circuits," Bell Systems Technical J., vol. 28, pp. 59-98, Jan. 1949.
-
(1949)
Bell Systems Technical J.
, vol.28
, pp. 59-98
-
-
Shannon, C.E.1
-
70
-
-
0033100442
-
On the Rectangularity of Nonlinear Block Codes
-
Mar.
-
V.R. Sidorenko, I. Martin, and B. Honary, "On the Rectangularity of Nonlinear Block Codes," IEEE Trans. Information Theory, vol. 45, pp. 720-725, Mar. 1999.
-
(1999)
IEEE Trans. Information Theory
, vol.45
, pp. 720-725
-
-
Sidorenko, V.R.1
Martin, I.2
Honary, B.3
-
71
-
-
0030290419
-
Expander Codes
-
Nov.
-
M. Sipser and D.A. Spielman, "Expander Codes," IEEE Trans. Information Theory, vol. 42, pp. 1,710-1,722, Nov. 1996.
-
(1996)
IEEE Trans. Information Theory
, vol.42
-
-
Sipser, M.1
Spielman, D.A.2
-
72
-
-
0019608335
-
A Recursive Approach to Low-Complexity Codes
-
Sept.
-
R.M. Tanner, "A Recursive Approach to Low-Complexity Codes," IEEE Trans. Information Theory, vol. 27, pp. 533-547, Sept. 1981.
-
(1981)
IEEE Trans. Information Theory
, vol.27
, pp. 533-547
-
-
Tanner, R.M.1
-
73
-
-
33747227344
-
Trellis Complexity and Soft-Decision Decoding: Conventional and Unconventional Results on Conventional Trellises
-
Svalbard, Norway, July
-
A. Vardy, "Trellis Complexity and Soft-Decision Decoding: Conventional and Unconventional Results on Conventional Trellises," Proc. IEEE Int'l Workshop Information Theory, pp. 67-69, Svalbard, Norway, July 1997.
-
(1997)
Proc. IEEE Int'l Workshop Information Theory
, pp. 67-69
-
-
Vardy, A.1
-
74
-
-
0031275868
-
The Intractability of Computing the Minimum Distance of a Code
-
Nov.
-
A. Vardy, "The Intractability of Computing the Minimum Distance of a Code," IEEE Trans. Information Theory, vol. 43, pp. 1,757-1,766, Nov. 1997.
-
(1997)
IEEE Trans. Information Theory
, vol.43
-
-
Vardy, A.1
-
75
-
-
0000051698
-
Trellis Structure of Codes
-
V.S. Pless and W.C. Huffman, ed., chapter 24. Amsterdam: Elsevier
-
A. Vardy, "Trellis Structure of Codes," Handbook of Coding Theory, V.S. Pless and W.C. Huffman, ed., chapter 24. Amsterdam: Elsevier, 1998.
-
(1998)
Handbook of Coding Theory
-
-
Vardy, A.1
-
76
-
-
0030284362
-
Proof of a Conjecture of McEliece Regarding the Expansion Index of the Minimal Trellis
-
Nov.
-
A. Vardy and F.R. Kschischang, "Proof of a Conjecture of McEliece Regarding the Expansion Index of the Minimal Trellis," IEEE Trans. Information Theory, vol. 42, pp. 2,027-2,033, Nov. 1996.
-
(1996)
IEEE Trans. Information Theory
, vol.42
-
-
Vardy, A.1
Kschischang, F.R.2
-
77
-
-
0028533061
-
The Size of Reduced OBDDs and Optimal Read-Once Branching Programs for Almost All Boolean Functions
-
Dec.
-
I. Wegener, "The Size of Reduced OBDDs and Optimal Read-Once Branching Programs for Almost All Boolean Functions," IEEE Trans. Computers, vol. 43, no. 12, pp. 1,262-1,269, Dec. 1994,
-
(1994)
IEEE Trans. Computers
, vol.43
, Issue.12
-
-
Wegener, I.1
-
78
-
-
33747263291
-
Graph-Theoretic Concepts in Computer Science
-
Berlin: Springer-Verlag
-
see also "Graph-Theoretic Concepts in Computer Science," Lecture Notes Computer Science, vol. 790, pp. 252-263, Berlin: Springer-Verlag, 1994.
-
(1994)
Lecture Notes Computer Science
, vol.790
, pp. 252-263
-
-
-
79
-
-
0013411143
-
Satisfiability Problems for OFDDs
-
T. Sasao and M. Fujita, eds. Boston: Kluwer Academic
-
R. Wercherner, R. Harich, R. Drechsler, and B. Becker, "Satisfiability Problems for OFDDs," Representations of Discrete Functions, T. Sasao and M. Fujita, eds. Boston: Kluwer Academic, 1996.
-
(1996)
Representations of Discrete Functions
-
-
Wercherner, R.1
Harich, R.2
Drechsler, R.3
Becker, B.4
-
80
-
-
0029371056
-
Codes and Iterative Decoding on General Graphs
-
May
-
N. Wiberg, H.-A. Loeliger, and R. Kötter, "Codes and Iterative Decoding on General Graphs," European Trans. Telecomm., vol. 6, pp. 513-526, May 1995.
-
(1995)
European Trans. Telecomm.
, vol.6
, pp. 513-526
-
-
Wiberg, N.1
Loeliger, H.-A.2
Kötter, R.3
-
81
-
-
84866959439
-
Trellis Complexity and Generalized Hamming Weights
-
Svalbard, Norway, July
-
Ø. Ytrehus, "Trellis Complexity and Generalized Hamming Weights," Proc. IEEE Int'l Workshop Information Theory, pp. 71-72, Svalbard, Norway, July 1997.
-
(1997)
Proc. IEEE Int'l Workshop Information Theory
, pp. 71-72
-
-
Ytrehus, Ø.1
|