High performance BDD package by exploiting memory hierarchy

Proceedings - Design Automation Conference

Volumn , Issue , 1996, Pages 635-640

  Sanghavi, Jagesh V ^a   Ranjan, Rajeev K ^a   Brayton, Robert K ^a   Sangiovanni Vincentelli, Alberto ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUFFER STORAGE; CRITICAL PATH ANALYSIS; DATA STRUCTURES; DECISION TABLES; GRAPH THEORY; HIERARCHICAL SYSTEMS; INTEGRATED CIRCUITS; PIPELINE PROCESSING SYSTEMS; STORAGE ALLOCATION (COMPUTER);

BINARY DECISION DIAGRAM (BDD); BREADTH FIRST ALGORITHM; MEMORY ACCESS PATTERNS;

ELECTRIC NETWORK SYNTHESIS;

EID: 0029708239     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/240518.240638     Document Type: Conference Paper

References (8)