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Volumn 87, Issue 3, 1999, Pages 456-466

Producer-Consumer Communication in Distributed Shared Memory Multiprocessors

Author keywords

Cache memories; Message passing; Parallel architectures; Shared memory systems; Synchronization

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SYSTEMS PROGRAMMING; DATA COMMUNICATION SYSTEMS; PARALLEL PROCESSING SYSTEMS; RESPONSE TIME (COMPUTER SYSTEMS);

EID: 0033097556     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/5.747866     Document Type: Article
Times cited : (31)

References (29)
  • 5
    • 0018152817 scopus 로고
    • A new solution to coherence problems in multicache systems,"
    • Dec.
    • L. Censier and P. Feautrier, " A new solution to coherence problems in multicache systems," IEEE Trans. Compiit., vol. C-27, pp.1112-1118, Dec. 1978.
    • (1978) IEEE Trans. Compiit. , vol.C-27 , pp. 1112-1118
    • Censier, L.1    Feautrier, P.2
  • 6
    • 0030217026 scopus 로고    scopus 로고
    • The scalable coherent interface (SCI)
    • Aug.
    • D. B. Gustavson and Q. Li, " The scalable coherent interface (SCI)," IEEE Commun. Mag., vol. 34, pp.52-63, Aug. 1996.
    • (1996) IEEE Commun. Mag. , vol.34 , pp. 52-63
    • Gustavson, D.B.1    Li, Q.2
  • 7
    • 85034517670 scopus 로고
    • Performance evaluation of linkbased cache coherence schemes," in
    • Jan.
    • H. Grahn and P. Stenström, " Performance evaluation of linkbased cache coherence schemes," in Proc. Hawaii Int. Conf. Systems Sciences, Jan. 1993, vol. 1, pp.486-495.
    • (1993) Proc. Hawaii Int. Conf. Systems Sciences , vol.1 , pp. 486-495
    • Grahn, H.1    Stenström, P.2
  • 8
    • 0002031606 scopus 로고
    • Tolerating latency through softwarecontrolled prefetching in shared-memory multiprocessors
    • June
    • T. Mowry and A. Gupta, " Tolerating latency through softwarecontrolled prefetching in shared-memory multiprocessors," JPDC, vol. 12, no. 2, pp.87-106, June 1991.
    • (1991) JPDC , vol.12 , Issue.2 , pp. 87-106
    • Mowry, T.1    Gupta, A.2
  • 10
    • 0030584614 scopus 로고    scopus 로고
    • Integrating fine-grained message passing in cache coherent shared memory multiprocessors
    • Mar.
    • D. K. Poulsen and P.-C. Yew, " Integrating fine-grained message passing in cache coherent shared memory multiprocessors," JPDC, vol. 33, no. 2, pp.172-188, Mar. 1996.
    • (1996) JPDC , vol.33 , Issue.2 , pp. 172-188
    • Poulsen, D.K.1    Yew, P.-C.2
  • 11
    • 71949094325 scopus 로고
    • StreamLine: Cache-based message passing in scalable multiprocessors
    • G. T. Byrd and B. A. Delagi, " StreamLine: Cache-based message passing in scalable multiprocessors," in Proc. Intl. Conf. Parallel Processing, Aug. 1991, vol. I, pp.251-254.
    • (1991) Proc. Intl. Conf. Parallel Processing, Aug. , vol.1 , pp. 251-254
    • Byrd, G.T.1    Delagi, B.A.2
  • 13
    • 0028013971 scopus 로고
    • Update-based cache coherence protocols for scalable shared-memory multiprocessors
    • Jan.
    • D. B. Glasco, B. A. Delagi, and M. J. Flynn, " Update-based cache coherence protocols for scalable shared-memory multiprocessors," in Proc. 27th Hawaii Int. Conf. Systems Sciences, Jan. 1994, pp.534-545.
    • (1994) Proc. 27th Hawaii Int. Conf. Systems Sciences , pp. 534-545
    • Glasco, D.B.1    Delagi, B.A.2    Flynn, M.J.3
  • 14
  • 17
    • 0030577619 scopus 로고    scopus 로고
    • Cache-based synchronization in shared memory multiprocessors
    • Jan.
    • U. Ramachandran and J. Lee, " Cache-based synchronization in shared memory multiprocessors," JPDC, vol. 32, pp.11-27, Jan. 1996.
    • (1996) JPDC , vol.32 , pp. 11-27
    • Ramachandran, U.1    Lee, J.2
  • 18
    • 0029428663 scopus 로고
    • Architectural mechanisms for explicit communication in shared memory multiprocessors," in
    • Dec.
    • U. Ramachandran, G. Shah, A. Sivasubramaniam, A. Singla, and I. Yanasek, " Architectural mechanisms for explicit communication in shared memory multiprocessors," in Proc. Supercompiitins '95, vol. 2, Dec. 1995, pp.1737-1775.
    • (1995) Proc. Supercompiitins '95 , vol.2 , pp. 1737-1775
    • Ramachandran, U.1    Shah, G.2    Sivasubramaniam, A.3    Singla, A.4    Yanasek, I.5
  • 20
    • 0030737826 scopus 로고    scopus 로고
    • The impact of instruction-level parallelism on multiprocessor performance and simulation methodology,in
    • V. S. Pai, P. Ranganathan, and S. V. Adve, " The impact of instruction-level parallelism on multiprocessor performance and simulation methodology," in Proc. Int. Symp. High Performance Computer Architecture, 1997, pp.72-83.
    • (1997) Proc. Int. Symp. High Performance Computer Architecture , pp. 72-83
    • Pai, V.S.1    Ranganathan, P.2    Adve, S.V.3
  • 22
    • 0024131166 scopus 로고
    • Concurrent miss resolution in multiprocessor caches," in
    • Aug.
    • C. Scheurich and M. Dubois, " Concurrent miss resolution in multiprocessor caches," in Proc. Int. Conf. Parallel Processing, Aug. 1988, vol. 1, pp.118-125.
    • (1988) Proc. Int. Conf. Parallel Processing , vol.1 , pp. 118-125
    • Scheurich, C.1    Dubois, M.2
  • 23
    • 0030819327 scopus 로고    scopus 로고
    • Spider: A hiah-speed network interconnect,"
    • Jan.
    • M. Galles, " Spider: A hiah-speed network interconnect," IEEE Micro, vol. 17, pp.34-39, Jan. 1997.
    • (1997) IEEE Micro , vol.17 , pp. 34-39
    • Galles, M.1
  • 24
    • 0000002112 scopus 로고    scopus 로고
    • The Cray T3E network: Adaptive routing in a high performance 3D torus
    • Aug.
    • S. L. Scott and G. M. Thorson, " The Cray T3E network: Adaptive routing in a high performance 3D torus," in Proc. Hot Interconnects IV, Aug. 1996, pp.147-156.
    • (1996) Proc. Hot Interconnects IV , pp. 147-156
    • Scott, S.L.1    Thorson, G.M.2
  • 29
    • 0011675885 scopus 로고
    • Wire-efficient VLSI multiprocessor communication networks,in
    • Cambridge, MA: MIT Press
    • W. J. Dally, " Wire-efficient VLSI multiprocessor communication networks," in Advanced Research in VLSI. Cambridge, MA: MIT Press, 1987, pp.391-415.
    • (1987) Advanced Research in VLSI. , pp. 391-415
    • Dally, W.J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.