A method for circular pattern recognition in a binary image and its implementation onto an FPGA

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E82-A, Issue 2, 1999, Pages 246-253

  Tokunaga, Yusuke ^a   Inoue, Takahiro ^a  

^a KUMAMOTO UNIVERSITY   (Japan)

Author keywords

Digital hardware implementation; FPGA; Pattern recognition; Template matching

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; FIELD PROGRAMMABLE GATE ARRAYS; REAL TIME SYSTEMS;

DIGITAL HARDWARE IMPLEMENTATION; TEMPLATE MATCHING;

PATTERN MATCHING;

EID: 0032679285     PISSN: 09168508     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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