Repeater insertion in RLC lines for minimum propagation delay

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 6, Issue , 1999, Pages

  Ismail, Yehea I ^a   Friedman, Eby G ^a  

^a UNIVERSITY OF ROCHESTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MINIMUM PROPAGATION DELAYS; REPEATER INSERTION;

COMPUTER SIMULATION; GATES (TRANSISTOR); INTEGRATED CIRCUIT LAYOUT; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS; TELECOMMUNICATION REPEATERS; VLSI CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 0032633647     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

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