Charge-and-split sense amplifier for multilevel nonvolatile memories

Electronics Letters

Volumn 35, Issue 10, 1999, Pages 796-798

  Torelli, G ^a   Calligaro, C ^b   Manstretta, A ^c   Pierin, A ^c   Rolandi, P ^c  

^a UNIVERSITY OF PAVIA   (Italy)

^b MAPP Technology   (Italy)

^c STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CONVERTERS; INTEGRATED CIRCUIT TESTING; MOS DEVICES; NONVOLATILE STORAGE;

CHARGE-AND-SPLIT SENSE AMPLIFIERS;

DIFFERENTIAL AMPLIFIERS;

EID: 0032632320     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19990529     Document Type: Article

References (4)

1. BAUER, M.: 'A multi-level-cell 32Mb Flash memory', 1995 IEEE ISSCC Dig. Tech. Papers, 1995, pp. 132-133
2. RICCÒ, B., TORELLI, G., LANZONI, M., MANSTRETTA, A., MAES, H.E., MONTANARI, D., and MODELLI, A.: 'Nonvolatile multilevel memories for digital applications', Proc. IEEE, 1998, 86, (12), pp. 2399-2421
3. CALLIGARO, C., MANSTRETTA, A., MODELLI, A., and TORELLI, G.: 'Technological and design constraints for multilevel flash memories', Proc. IEEE Int. Conf on Electronics, Circuits and Systems, 1996, pp. 1005-1008
4. JINBO, T., NAKATA, H., HASHIMOTO, K., WATANABE, T., NINOMIYA, K., URAI, T., KOIKE, M., SATO, T., KODAMA, N., OYAMA, K., and OKAZAWA, T.: 'A 5V-only 16-Mb flash memory with sector erase mode', IEEE J. Solid-State Circuits, 1992, SC-27, (11), pp. 1547-1554