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Volumn , Issue , 1999, Pages 79-88

Tighter timing predictions by automatic detection and exploitation of value-dependent constraints

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURAL FEATURES; ARCHITECTURAL MODELING; AUTOMATIC DETECTION; CONDITIONAL BRANCH; CONSTRAINT INFORMATION; REAL TIME PROGRAMS; TIMING ANALYSIS; WORST-CASE EXECUTION TIME;

EID: 0032593201     PISSN: 10801812     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTTAS.1999.777663     Document Type: Conference Paper
Times cited : (33)

References (13)
  • 13
    • 0026256102 scopus 로고
    • A Design environment for addressing architecture and compiler interactions
    • November
    • J. W. Davidson and D. B. Whalley, "A Design Environment for Addressing Architecture and Compiler Interactions, " Microprocessors and Microsystems 15(9) pp. 459-472 (November 1991).
    • (1991) Microprocessors and Microsystems , vol.15 , Issue.9 , pp. 459-472
    • Davidson, J.W.1    Whalley, D.B.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.