High-speed software-based platform for embedded software of a single-chip MPEG-2 video encoder LSI with HDTV scalability

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 1999, Pages 303-308

  Ochiai, Katsuyuki ^a   Iwasaki, Hiroe ^a   Naganuma, Jiro ^a   Endo, Makoto ^a   Ogura, Takeshi ^a  

^a NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

MPEG-2 VIDEO; SIMULATION SPEED; SINGLE-CHIP;

COMPUTER HARDWARE DESCRIPTION LANGUAGES; DESIGN; EXHIBITIONS; HIGH DEFINITION TELEVISION; MOTION PICTURE EXPERTS GROUP STANDARDS; SCALABILITY;

EMBEDDED SOFTWARE;

EID: 0005300514     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1999.761138     Document Type: Conference Paper

References (10)

1. Daniel D. Gaiski, Frank Vahid, Sanjiv Narayan, and Jie Gong, "Specification and Design of Embedded Systems," Prentice Hall, 1994.
2. T. Kondo, K. Suguri, M. Ikeda, T. Abe, H. Matsuda, T. Okubo, K. Ogura, T. Tashiro, N. Ono, T. Minami, R. Kusaba, T. Ikenaga, N. Shibata, R. Kasai, K. Otsu, F. Nakagawa, and Y. Sato, "Two-Chip MPEG2 Video Encoder," IEEE Micro, pp. 51-58, April 1996.
3. M. Inamori, J. Naganuma, H. Wakabayashi, and M. Endo, "A Memory-based Architecture for MPEG2 System Protocol LSIs," The European Design and Test Conference (ED&TC), March 1996.
4. "Chronologic VCS Reference Manual (Release 4.1)," Synopsys, Inc., March 1998.
5. "LightSpeed Simulation Server Reference Manual (Version 1.0)," Zycad Corporation, November 1996.
6. "System Realizer Reference Manual (Version 5.1)," Quickturn Design Systems, Inc., December 1997.
7. "Seamless CVE Reference Manual (Release 2.4)," Mentor Graphics Corporation, July 1998.
8. C. A. R. Hoare, "Communicating Sequential Processes," Comm. ACM, Vol. 21, No. 8, pp. 666-677, August 1978.
9. T. Minami, T. Kondo, K. Nitta, S. Suguri, M. Ikeda, T. Yoshitome, H. Watanabe, H. Iwasaki, K. Ochiai, J. Naganuma, M. Endo, E. Yamagishi, T. Takahashi, K. Tadaishi, Y. Tashiro, N. Kobayashi, T. Okubo, T. Ogura, and R. Kasai, "A Single-Chip MPEG2 MP@ML Video Encoder LSI with Multi-chip Configuration for a Single-board HP@ML Encoder," Hot Chips 10, August 1998.
10. M. Ikeda, T. Kondo, K. Nitta, K. Suguri, T. Yoshitome, T. Minami, J. Naganuma, and T. Ogura "An MPEG-2 Video Encoder LSI with Scalability for HDTV based on Three-layer Cooperative Architecture," Proc. of the Design, Automation and Test in Europe (DATE), March 1999.