Yield improvement via automatic analysis of wafer processing order

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 3510, Issue , 1998, Pages 135-146

  Merino, Miguel A ^a   Recio, Miguel ^a   Moreno, Julian ^a   Martín, Victorino ^a   Fernández, Almudena ^a   González, Gerardo ^a   Borrego, Enrique ^a  

^a Lucent Technologies Microelectronica   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED ANALYSIS; COMPUTER SIMULATION; PATTERN RECOGNITION; PHOTORESISTS;

AUTOMATIC ANALYSIS; ORDER PROCESSING PATTERN; SOFTWARE PACKAGE POSISCAN; WAFERS;

MICROELECTRONIC PROCESSING;

EID: 0032404637     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.324372     Document Type: Conference Paper

References (11)

1. C. Gondran "A Technique for Measuring and Improving Yield Team Performance" Yield Management Seminar Proceedings, KLA Yield Management Series, Austin TX, 1996.
2. F. Lee, P. Wang, R. Ceton, R. Goodner and M. Chan "Yield Enhancement Strategies for Start-up of a High-Volume 8 inch Wafer Fab", Proceedings on 6th Annual IEEE/SEMI Conference, Cambridge, MA, pp.259-265, 1995.
3. S.P. Cunningham, C.J. Spanos and K. Voros. "Semiconductor Yield Improvement: Results and Best Practices", IEEE Trends on Semic. Manuf., vol. 8, No 2, pp.103-109. May 1995.
4. P.Prator. "SEMATECH Develops Software for Yield Enhancement, Defect Tracking". Solid State Technology, pp.36-41, December 1994.
5. C.H. Stapper and R.J. Rosner. "Integrated Circuit Yield Management and Yield Analysis: Development and Implementation", IEEE Trends on Semic. Manuf. Vol.8, No. 2, pp.95-102, May 1995.
6. M. Recio, A. Fernández, V. Martín, M.J. Pemán, G. González, J.R. Hoyer, S. Whitlock, D. James and M. Hansen. "Advanced Software System for Yield Improvement in Manufacturing Fab". Proceedings on SPIE's 1996 Microelectronic Manufacturing, vol. 2874, pp.219-229, 1996.
7. V. Martín, M. Recio, M.A. Merino, J. Moreno, G. González, G. Sánchez, L. Barrios, M.D. del Castillo, L. Lemus and A. González. "Knowledge-Based Software System for Fast Yield Loss Detection in a Semiconductor Fab." Proceedings on SPIE's 1997 Microelectronic Manufacturing, vol. 3216, pp.88-101, 1997.
8. J. Khare, W. Maly, S. Griep and D. Schmitt-Landsiedel. "Yield-Oriented Computer-Aided Diagnosis", IEEE Trans on Semic. Manuf., vol. 8, pp.195-206, 1995.
9. F. Lee, P. Wang and R. Goodner. "Factory Start-up and Production Ramp: Yield Improvement through Signature Analysis and Visual/Electrical Correlation". IEEE/SEMI Advanced Semic. Manuf. Conf., pp. 267-270, 1995.
10. A. Ferńndez, A. Urquía, M. Recio, V. Martín, V. Vega, A. Riloba, S. Whitlock and J.R. Hoyer "Bitmap in Multimodule IC as a Tools for Baseline Failure Analysis". Proceedings on 20th Int. Symp. For Test and Failure Analysis, pp. 267-272, 1994.
11. S.K. Murthy, S. Kasif, S. Salzberg "A System for Induction of Oblique Decision Trees". Journal of Artifical Intelligence Research 2 (1994) 1-32