On-line testing for VLSI: State of the art and trends

Integration, the VLSI Journal

Volumn 26, Issue 1-2, 1998, Pages 197-209

  Nicolaidis, Michael ^a  

^a TIMA LABORATORY   (France)

Author keywords

Deep submicron scaling; Fail safe circuits; Hardware fault tolerance; On line current monitoring; On line testing; Perturbation hardened circuits; Self checking circuits; Soft errors

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER AIDED SOFTWARE ENGINEERING; ELECTRIC CURRENTS; ERROR ANALYSIS; FAULT TOLERANT COMPUTER SYSTEMS; INTEGRATED CIRCUIT TESTING; ONLINE SYSTEMS; PERTURBATION TECHNIQUES;

DEEP SUBMICRON SCALING; PERTURBATION HARDENED CIRCUITS; SELF-CHECKING CIRCUITS;

VLSI CIRCUITS;

EID: 0032315090     PISSN: 01679260     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-9260(98)00028-5     Document Type: Article

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