Testing the 500-MHz IBM S/390 microprocessor

IEEE Design and Test of Computers

Volumn 15, Issue 3, 1998, Pages 83-89

  Foote, Thomas G ^a,b,c   Hoffman, Dale E ^a,d,e,f   Huott, William V ^a,e   Koprowski, Timothy J ^a,f,g   Kusko, Mary P ^a,c,h   Robbins, Bryan J ^a,b  

^a IBM   (United States)

^b PURDUE UNIVERSITY   (United States)

^c IEEE

^d PENNSYLVANIA STATE UNIVERSITY   (United States)

^e SYRACUSE UNIVERSITY   (United States)

^f Electrostal Polytechnic Institute   (Russian Federation)

^g LEHIGH UNIVERSITY   (United States)

^h UNIVERSITY OF DELAWARE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING;

DESIGN FOR TEST (DFT) FRAMEWORKS;

MICROPROCESSOR CHIPS;

EID: 0032120613     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.706038     Document Type: Article

References (13)

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